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In this letter, a novel structure of polycrystallinesilicon thin-film transistors (TFTs) with self-aligned raised source/ drain (SARSD) and a thin channel has been developed and investigated. In the proposed structure, a thick SD and a thin active region could be achieved with only four mask steps, which are less than that in conventional raised SD TFTs. The proposed SARSD TFT has a higher ON-state current and a lower OFF-state leakage current. Moreover, the ON/OFF current ratio of the proposed SARSD TFT is also higher than that of a conventional coplanar TFT.Index Terms-Four masks, ON/OFF current ratio, polycrystalline-silicon thin-film transistor (poly-Si TFT), self-aligned raised source/drain (SARSD), thin channel.

In this study, the trap properties of composite Hf 0.83 Zr 0.17 O 2 high-k gate stack p-type MOSFETs (pMOSFETs) were investigated by simultaneous low-frequency (1/f ) noise and random telegraph noise measurements. Compared with pure ZrO 2 pMOSFETs, the interface property and drive current of Hf 0.83 Zr 0.17 O 2 pMOSFETs were both improved, and the depth of the effective centroid of the fixed charges was close to the insulator/ semiconductor interface. This result indicated that the trapping behavior of hole capture from a ZrO 2 film can be suppressed by mixing the film with a HfO 2 film. Consequently, comparable oxide trap densities and trapping depths between Hf 0.83 Zr 0.17 O 2 and HfO 2 pMOSFETs can be seen. In addition, it was found that the unified model can appropriately interpret the 1/f noise mechanism in Hf 0.83 Zr 0.17 O 2 pMOSFETs.

We have studied the low-frequency noise characterizations in 28-nm high-k (HK) pMOSFET with embedded SiGe source/drain (S/D) through 1/ noise and random telegraph noise measurements simultaneously. It is found that uniaxial compressive strain really existed in HK pMOSFET with embedded SiGe S/D. The compressive strain induced the decrease in the tunneling attenuation length reflecting in the oxide trap depth from Si/SiO 2 interface to the HK layer, so that the oxide traps at a distance from insulator/semiconductor interface cannot capture carrier in the channel. Consequently, lower 1/ noise level in HK pMOSFET with embedded SiGe S/D is observed, thanks to the less carrier fluctuations from trapping/detrapping behaviors. This result represents an intrinsic benefit of HK pMOSFET using embedded SiGe S/D in low-frequency noise characteristics.