In the past few decades, gate insulators with a high dielectric constant (high-k dielectric) enabling a physically thick but dielectrically thin insulating layer, have been used to replace traditional SiOx insulator and to ensure continuous downscaling of Si-based transistor technology. However, due to the non-silicon derivative natures of the high-k metal oxides, transport properties in these dielectrics are still limited by various structural defects on the hetero-interfaces and inside the dielectrics. Here, we show that another insulating silicon compound, amorphous silicon nitride (a-Si3N4), is a promising candidate of effective electrical insulator for use as a high-k dielectric. We have examined a-Si3N4 deposited using the plasma-assisted atomic beam deposition (PA-ABD) technique in an ultra-high vacuum (UHV) environment and demonstrated the absence of defect-related luminescence; it was also found that the electronic structure across the a-Si3N4/Si heterojunction approaches the intrinsic limit, which exhibits large band gap energy and valence band offset. We demonstrate that charge transport properties in the metal/a-Si3N4/Si (MNS) structures approach defect-free limits with a large breakdown field and a low leakage current. Using PA-ABD, our results suggest a general strategy to markedly improve the performance of gate dielectric using a nearly defect-free insulator.

We achieved direct visualization of the piezoelectric potentials in a single bent ZnO microwire (MW) using focused synchrotron radiation (soft x-ray) scanning photoelectron spectro-microscopy. Using radial-line scan across the bent section of ZnO MW, the characteristic core-level shifts were directly related to the spatial distribution of piezoelectric potentials perpendicular to the ZnO polar direction. Using piezoelectric modeling in ZnO, we delineated the band structure distortion and carrier concentration change from tensile to compressed sides by combining the spatial resolved cathodoluminescence characteristics in an individual microwire. This spectro-microscopic technique allows imaging and identification of the electric-mechanical couplings in piezoelectric micro-/nano-wire systems.

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The core-level electronic structures of the exfoliated graphene sheets on a Au-coated SiO x substrate have been studied by synchrotron radiation photoelectron spectroscopy (SR-PES) on a micron-scale. The graphene was firstly demonstrated its visibility on the Au-coated SiO x substrate by micro-optical characterization, and then conducted into SR-PES study. Because of the elimination of charging effect, precise C 1s core-level characterization clearly shows graphitic and contaminated carbon states of graphene. Different levels of Au-coating-induced p-type doping on single-and double-layer graphene sheets were also examined in the C 1s core-level shift. The Au-coated SiO x substrate can be treated as a simple but high-throughput platform for in situ studying graphene under further hybridization by PES.

Mono to few-layer graphene were prepared on pre-annealed polycrystalline nickel substrates by chemical vapor deposition at a relatively low temperature of 800 degrees C using fast cooling rate. It was observed that the reduced solubility of Carbon in Ni at low temperature and an optimum gas mixing ratio (CH4:H2 = 60/80 (sccm)) can be used to synthesize mano-layer graphene that covers about 100 microm2 area. The number of graphene layers strongly depends upon the hydrogen and methane flow rates. An increase in the methane flow is found to increase the growth density of the single-layer graphene. The number of graphene layers was identified from micro-Raman spectra. The thinnest areas containing mono-layer graphene formed at small Ni grains surrounded by large Ni Grains can be explained in terms of Spinodal decomposition. Scanning tunneling microscopy observations of the graphene samples indicate that the graphene structure exhibits no defects, and extremely symmetry hexagon carbon at flat graphene surface is observed.