Summary DC‐DC converters are conventionally utilized to drive DC motors, where boost converters are employed in several emerging drive‐based applications. The modern boost converter motor drives are controlled with digital circuits due to its flexibility and cost‐effectiveness. However, the impact of the sampling in digital controllers is generally neglected during the modeling of the drives. In this paper, the sampling effect of digital controllers is analyzed for the steady‐state speed of the boost converter fed brushed permanent magnet DC (PMDC) motor drive, and the corresponding mathematical model is proposed. A relationship is established between time delay, multisampling factor, and duty ratio, which is further implemented on the PMDC motor model. The modeling shows that a time delay in pulse generation is induced due to the sampling that changes the duty ratio and the resultant motor speed. The variation in motor speed obtained from the analysis justifies the relevance of the proposed model. The proposed mathematical model shows that a high sampling frequency of the digital controller is essential to adapt the analog controller‐based motor drive behavior. However, an optimization methodology between the controller frequency and drive performance for low‐cost applications has been mentioned in this paper. The experimental analysis performed on the simulation environment and the real‐time laboratory prototype complements the precision of the proposed model.

In this article, proportional resonant (PR) controller‐based pulse width modulation (PWM) current control for three‐phase, three‐leg SAPF with the optimized dc‐link controller is implemented to compensate for current harmonics produced by nonlinear loads. The optimization of the dc‐link voltage regulator is implemented using Bat Algorithm (BA). The stability of the current controller with the proposed system with a mathematical model is evaluated in the time and frequency domain. Instantaneous real and reactive power theory (pq‐theory) is applied for reference currents generation. Simulation of the proposed controller is performed in MATLAB/Simulink environment. The controller is implemented in FPGA platform and the results of simulation are verified with the experimental prototype. The optimized dc‐link results in the improved performance of SAPF. The new dimension of the PR controller in a grid‐connected system for harmonic regulation is implemented and validated with experimental results. The objective of reduced current harmonics with a minimum per phase fundamental current and unity power factor at the point of common coupling is achieved.

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