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This paper explores gate-to-source/drain nonoverlapped implantation (NOI) devices that function as nonvolatile memories (NVMs) by trapping charges in the silicon nitride spacers. These NOI nMOSFET devices with improved NVM characteristics were simulated and demonstrated. For a 0.8 V shift in the threshold voltage, the programming and erasing speeds of NOI devices are as fast as 40 and 60 µs, respectively. Improvements of other related NVM characteristics, including charge retention and cycling endurance, are reported. Finally, the scalability of NOI devices is simulated and discussed. Index Terms-Charge trapping, nonoverlapped implantation (NOI), nonvolatile memory (NVM). Since 2005, he has beenan Associate Professor in the Department of Electronic Engineering, Chung Yuan Christian University with conducting research on surface acoustic wave sensors and semiconductor memories. His current research interests are in the areas of advanced CMOS processing technologies; characterization, simulation and modeling of deep-submicrometer nonvolatile memory devices and the cell array design for nonvolatile memory applications.