No abstract

In this paper an analysis of the effects of integrated circuit packaging substrates on a radio frequency (RF) IC is presented. At RF frequencies the effects of packaging parasitics become crucial when assembling an RF system in package (SiP) or integrating a single die with a package. A differential buffer, which had been previously fabricated in a 90nm CMOS process is used as a vehicle to analyze the effects of packaging on performance. The integration of the buffer die with the package is modeled and analyzed.

This paper introduces and analyzes a novel method of printed circuit board (PCB) power distribution network (PDN) improvement. This is achieved by using stacked passive components on an integrated circuit (IC) die to improve circuit performance by providing local power supply decoupling. These stacked passives are orders of magnitude greater than what is available for die integration. The capacitors reduce PDN impedance resulting in lower system noise on the device's power supply rails. As the passive devices are located on top of the die, they are not impacted by packaging parasitics which would lessen the impact of package or board mounted decoupling capacitors.