The effects of strain on the conduction mechanism in heterostructures consisting of strained nano-thin 3C–SiC films on Si are reported. These films exhibit significantly different electrical behaviours than the bulk material. Strained nano-thin 3C–SiC films were grown on n-type Si substrates by gas source molecular beam epitaxy. Reflection high-energy electron diffraction patterns show that these films are about 3% strained relative to the SiC lattice constant. In order to investigate the electrical properties of thin film structures, Al, Cr and Pt contacts to a nano-thin film 3C–SiC were deposited and characterized. The I–V measurements of the strained nano-thin films demonstrate back-to-back Schottky diode characteristics and the band offsets due to the biaxial tensile strain introduced within the 3C–SiC films were calculated and simulated. Based on the experimental and simulation results, an empirical model for the current transport in the heterostructures based on strained nano-thin films has been proposed. It was found that due to the band alignment of this structure, current is constrained at the surface which allows use of nano-thin films as surface sensors.
To understand the origins of stress in thin films, we have used wafer curvature to measure the stress evolution during electrodeposition of Ni on lithographically patterned Si substrates. The stress is measured as the hemispherical islands grow and impinge upon each other, forming interfacial boundaries between them. We relate the results to a model for polycrystalline films in which the stress is attributed to competing processes occurring where the layers in adjacent grains grow into each other and form new segments of grain boundary. This model predicts that the stress in each layer depends on the rate at which the grain boundary is growing when that layer is incorporated into the film. The calculations agree with the measured stress vs thickness using a single set of fitting parameters for five different growth rates.
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