Simple tuneup of fast two-qubit gates is essential for the scaling of quantum processors. We introduce the sudden variant (SNZ) of the net zero scheme realizing controlled-Z (CZ) gates by flux control of transmon frequency. SNZ CZ gates realized in a multitransmon processor operate at the speed limit of transverse coupling between computational and noncomputational states by maximizing intermediate leakage. Beyond speed, the key advantage of SNZ is tuneup simplicity, owing to the regular structure of conditional phase and leakage as a function of two control parameters. SNZ is compatible with scalable schemes for quantum error correction and adaptable to generalized conditional-phase gates useful in intermediate-scale applications.
This
work demonstrates the influence of high-quality protection
layers on Si–Cu2O micropillar arrays created by
pulsed laser deposition (PLD), with the goal to overcome photodegradation
and achieve long-term operation during photoelectrochemical (PEC)
water splitting. Sequentially, we assessed planar and micropillar
device designs with various design parameters and their influence
on PEC hydrogen evolution reaction. On the planar device substrates,
a Cu2O film thickness of 600 nm and a Cu2O/CuO
heterojunction layer with a 5:1 thickness ratio between Cu2O to CuO were found to be optimal. The planar Si/Cu2O/CuO
heterostructure showed a higher PV performance (Jsc = 20 mA/cm2) as compared to the planar Si/Cu2O device, but micropillar devices did not show this improvement.
Multifunctional overlayers of ZnO (25 nm) and TiO2 (100
nm) were employed by PLD on Si/Cu2O planar and micropillar
arrays to provide a hole-selective passivation layer that acts against
photocorrosion. A micropillar Si/ITO-Au/Cu2O/ZnO/TiO2/Pt stack was compared to a planar device. Under optimized
conditions, the Si/Cu2O photocathode with Pt as a HER catalyst
displayed a photocurrent of 7.5 mA cm–2 at 0 V vs
RHE and an onset potential of 0.85 V vs RHE, with a stable operation
for 75 h.
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