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This paper presents a TBMA MOSFET table model. With the method, the function domain of interest is partitioned recursively.Compared with even partition strategy in conventional table look-up, the partition size of a region inside the domain is large when the function is less nonlinear in that region and it is smaller if the function is more nonlinear. To reduce the dimension of the table, the gate-offset-voltageconcept is used to shrink the three dimensional MOSFET model to a two dimensional model, maintaining the overall accuracy within a few percent. If smaller error is required, a TBMA correction table can be imposed to reduce the evaluation error to a specified value.Also, a new algorithm for constructing continuity partitions in TBMA table is proposed. 1.IntroductionComputer-aided transient analysis plays an important role in VLSI design. The run time of many circuit simulators such as SPICE [l] for VLSI simulation is always dominated by MOSFET model evaluation and making reduction on this time is the goal. As MOSFET size shrinks into the sub-micron range, analytic models become increasingly inappropriate because. high computational cost and complex three dimensional models are required to maintain good accuracy. Recently, there are some empirical models of MOSFET are proposed to replace analytic models because they have higher computational efficiency. Table look-up models and polynomial splines [2]-[4] are commonly used empirical models. Conventional table look-up is not suitable for accurate MOSFET device modeling, due to massive storage capacity necessary for three-dimensional table structure. On the other hand, multivariate monotonic splines are relatively expensive to evaluate because. they have considerable number of terms. This paper describes an empirical MOSFET model based on the Tree Based Model Approximation method (TBMA) [5]. The method is similar to the conventional table look-up method. The main difference between it and conventional table look-up is that it partitions the function domainaccording to its nonlinearity while the later method uses even partition strategy. If a function has higher nonlinearity at some parts of the domain, these parts will have smaller partitions. On the contrary, if the function is approximately linear, the partition sizes within these regions will be large. TBMA method has the advantage of requiring less memory and faster evaluation time than conventional table look-up.Similar to the table look-up, TBMA is not suitable for high dimensional function evaluation because. high dimensional tables require a lot of memory. In order to avoid this disadvantage, the gate-offsetvoltage concept [6] is used to shrink the three dimensional (3D) MOSFET model to a two dimensional (2D) model and the memory capacity requirement is greatly reduced.In Section 2, the TBMA method is described briefly and a new algorithm for constructing continuity partitions in TBMA table is proposed. Section 3 presents the MOSFET model using gate-offsetvoltage concept, and Section 4 gives the simulat...

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The number of discrete time points in numerical integration is significant to the runtime cost of a simulation. It depends on the integration step sizes and convergence of Newton-Raphson (NR) iterations. This paper presents the techniques in reducing the number of time points for VLSI simulations. n NR; 0-7803-2624-5/95/$4.00 @ 1995 IEEE