Abstract-The Open Spectrum approach to spectrum access can achieve near-optimal utilization by allowing devices to sense and utilize available spectrum opportunistically. However, a naive distributed spectrum assignment can lead to significant interference between devices. In this paper, we define a general framework that defines the spectrum access problem for several definitions of overall system utility. By reducing the allocation problem to a variant of the graph coloring problem, we show that the global optimization problem is NP-hard, and provide a general approximation methodology through vertex labeling. We examine both a centralized strategy, where a central server calculates an allocation assignment based on global knowledge, and a distributed approach, where devices collaborate to negotiate local channel assignments towards global optimization. Our experimental results show that our allocation algorithms can dramatically reduce interference and improve throughput (as much as 12-fold). Further simulations show that our distributed algorithms generate allocation assignments similar in quality to our centralized algorithms using global knowledge, while incurring substantially less computational complexity in the process.

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This paper describes an unconventional way to apply wireless networking in emerging technologies. It makes the case for using a two-tier hybrid wireless/wired architecture to interconnect hundreds to thousands of cores in chip multiprocessors (CMPs), where current interconnect technologies face severe scaling limitations in excessive latency, long wiring, and complex layout. We propose a recursive wireless interconnect structure called the WCube that features a single transmit antenna and multiple receive antennas at each micro wireless router and offers scalable performance in terms of latency and connectivity. We show the feasibility to build miniature on-chip antennas, and simple transmitters and receivers that operate at 100 − 500 GHz sub-terahertz frequency bands. We also devise new two-tier wormhole based routing algorithms that are deadlock free and ensure a minimum-latency route on a 1000-core on-chip interconnect network. Our simulations show that our protocol suite can reduce the observed latency by 20% to 45%, and consumes power that is comparable to or less than current 2-D wired mesh designs.

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