In this paper, two different SPAD structures are designed and fabricated by 0.13μm CMOS technology. For the structure-1, a guard ring with low implanted p-well is used at the edge of p + region, which prevents the periphery region breakdown while for the structure-2 a "virtual" guard ring structure with a p -well under the whole P + region is designed.The first structure exhibits a maximum photon detection probability of 15% and a typical dark count rate of 18 kHz at room temperature while the second structure exhibits a maximum of photon detection probability of 28% and a dark count rate of 23 kHz. These results would give a help for further advanced SPAD design.CMOS, SPAD, dark count rate, photon detect efficiency.

Two different structures of single photon avalanche diode(SPAD) fabricated by 0.13 m  flash process technology are presented. The structure-1 uses low implanted p-well surrounding the active area as the guard ring which prevents the periphery breakdown, while for the structure-2, a virtual guard ring with the deep retrograde nwell doping is designed. The characteristics of the two detectors with the same active area diameter are presented. The two SPAD structures exhibit relatively different dark and light performance. The first structure exhibits a typical dark count rate of 18 kHz at the room temperature and a maximum photon detection efficiency of 15%, while the second structure exhibits a dark count rate of 23 kHz and a maximum photon detection efficiency of 28%. The comparison of the two structures is therefore promising for the further advanced SPAD design.