Energy harvesting is an attractive way to power future Internet of Things (IoT) devices since it can eliminate the need for battery or power cables. However, harvested energy is intrinsically unstable. While Field-programmable Gate Array (FPGAs) have been widely adopted in various embedded systems, it is hard to survive unstable power since all the memory components in FPGA are based on volatile Static Random-access Memory (SRAMs). The emerging non-volatile memory-based FPGAs provide promising potentials to keep configuration data on the chip during power outages. Few works have considered implementing efficient runtime intermediate data checkpoint on non-volatile FPGAs. To realize accumulative computation under intermittent power on FPGA, this article proposes a low-cost design framework, Data-Flow-Tracking FPGA (DFT-FPGA), which utilizes binary counters to track intermediate data flow. Instead of keeping all on-chip intermediate data, DFT-FPGA only targets on necessary data that is labeled by off-line analysis and identified by an online tracking system. The evaluation shows that compared with state-of-the-art techniques, DFT-FPGA can realize accumulative computing with less off-line workload and significantly reduce online roll-back time and resource utilization.

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Energy harvesting is an a ractive way to power future IoT devices since it can eliminate the need for ba ery or power cables. However, harvested energy is intrinsically unstable. While FPGAs have been widely adopted in various embedded systems, it is hard to survive unstable power since all the memory components in FPGA are based on volatile SRAMs. e emerging non-volatile memory based FPGAs provide promising potentials to keep con guration data on the chip during power outages. Few works have considered implementing e cient runtime intermediate data checkpoint on non-volatile FPGAs. To realize accumulative computation under intermi ent power on FPGA, this paper proposes a low-cost design framework, Data-Flow-Tracking FPGA (DFT-FPGA), which utilizes binary counters to track intermediate data ow. Instead of keeping all on-chip intermediate data, DFT-FPGA only targets on necessary data that is labeled by o -line analysis and identi ed by an online tracking system. e evaluation shows that compared with state-of-the-art techniques, DFT-FPGA can realize accumulative computing with less o -line workload and signi cantly reduce online roll-back time and resource utilization. is paper has been accepted by ACM Journal on Emerging Technologies in Computing Systems (JETC).