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Abstract-It has been the conventional assumption that, due to the superlinear dependence of leakage power consumption on temperature, and widely varying on-chip temperature profiles, accurate leakage estimation requires detailed knowledge of thermal profile. Leakage power depends on integrated circuit (IC) thermal profile and circuit design style. We show that linear models can be used to permit highly-accurate leakage estimation over the operating temperature ranges in real ICs. We then show that for typical IC packages and cooling structures, a given amount of heat introduced at any position in the active layer will have similar impact on the average temperature of the layer. These two observations allow us to prove that, for wide ranges of design styles and operating temperatures, extremely fast, coarse-grained thermal models, combined with linear leakage power consumption models, permit highly-accurate system-wide leakage power consumption estimation. The results of our proofs are further confirmed via comparisons with leakage estimation based on detailed, time-consuming thermal analysis techniques. Experimental results indicate that the proposed technique yields a 59,259¢-1,790,000¢ speedup in leakage power estimation while maintaining accuracy.

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Abstract-In the past, dynamic voltage and frequency scaling (DVFS) has been widely used for power and energy optimization in embedded system design. As thermal issues become increasingly prominent, we propose design-time thermal optimization techniques for embedded systems. By carefully planning DVFS at design time, our techniques proactively optimize system thermal profile, prevent run-time thermal emergencies, minimize cooling costs, and optimize system performance. To the best of our knowledge, this is the first work addressing embedded system designtime thermal optimization using DVFS. We formulate minimization of application peak temperature in the presence of real-time constraints as a nonlinear programming problem. This provides a powerful framework for system designers to determine a proper thermal solution and provide a lower bound on the minimum temperature achievable by DVFS. Furthermore, we examine the differences between optimal energy solutions and optimal peak temperature solutions. Experimental results indicate that optimizing energy consumption can lead to unnecessarily high temperature. Finally, we propose a thermal-constrained energy optimization procedure to minimize system energy consumption under a constraint on peak temperature.

Energy harvesting has been widely investigated as a promising method of providing power for ultra-low-power applications. Such energy sources include solar energy, radiofrequency (RF) radiation, piezoelectricity, thermal gradients, etc. However, the power supplied by these sources is highly unreliable and dependent upon ambient environment factors. Hence, it is necessary to develop specialized systems that are tolerant to this power variation, and also capable of making forward progress on the computation tasks. The simulation platform in this paper is calibrated using measured results from a fabricated nonvolatile processor and used to explore the design space for a nonvolatile processor with different architectures, different input power sources, and policies for maximizing forward progress.