This paper describes the design, fabrication, installation and performance of the new inner layer called Layer 0 (L0) that was inserted in the existing Run IIa Silicon MicroStrip Tracker (SMT) of the D0 experiment at the Fermilab Tevatron p p collider. L0 provides tracking information from two layers of sensors, which are mounted with center lines at a radial distance of 16.1 mm and 17.6 mm respectively from the beam axis. The sensors and readout electronics are mounted on a specially designed and fabricated carbon fiber structure that includes cooling for sensor and readout electronics. The structure has a thin polyimide circuit bonded to it so that the circuit couples electrically to the carbon fiber allowing the support structure to be used both for detector grounding and a low impedance connection between the remotely mounted hybrids and the sensors.

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We describe a new optoelectronic switching system demonstration that implements part of the distribution fabric for a large asynchronous transfer mode (ATM) switch. The system uses a single optoelectronic VLSI modulator-based switching chip with more than 4000 optical input-outputs. The optical system images the input fibers from a two-dimensional fiber bundle onto this chip. A new optomechanical design allows the system to be mounted in a standard electronic equipment frame. A large section of the switch was operated as a 208-Mbits/s time-multiplexed space switch, which can serve as part of an ATM switch by use of an appropriate out-of-band controller. A larger section with 896 input light beams and 256 output beams was operated at 160 Mbits/s as a slowly reconfigurable space switch.

Demands for increased interconnection density and higher bandwidth, coupled with stringent cost constraints of advanced wide bandwidth telecommunication switching and high throughput computer architectures, are exhausting conventional electrical interconnection capabilities. The requirement for greater interconnection capabilities, spawned in part by the advances in integrated circuit technologies and the need for enhanced digital services, dictate that technology advancement must occur in traditional electronic packaging and/or interconnection techniques. The resolution of these technological needs is paramount for the successful competitive introduction of these systems. Presently, a "bottle-neck" occurs at the board-to-board level of the interconnection hierarchy. Therefore, an opportunity exists for the development of new parallel optical interconnection techniques which can be incorporated into system designs beginning at this interconnection level and beyond. The strategic insertion of parallel optical interconnection technology into these electronic processing systems not only meets projected performance requirements, but potentially offers them at a competitive cost.