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The need to transition to the use of Pb-free solders in the microelectronics industry has resulted in a vast amount of research and development work to identify suitable replacements for eutectic Pb-Sn. Although the near-eutectic ternary Sn-Ag-Cu (SAC) alloys have gained widespread acceptance, they have been found to exhibit poor component and board-level performance in certain applications, such as prolonged high temperature exposure, impact testing, and temperature cycling [1-3]. Another Pb-free alternative, eutectic Sn-Ag (Sn-3.5Ag), is gaining increasing recognition as an alloy which provides superior component and boardlevel performance, while not showing the metallurgical deficiencies observed in the SAC materials.As a follow-up to previous work which addressed the comparative component-level performance of the Pb-Sn versus SAC versus Sn-Ag alloys [4,5], this study characterized the board-level temperature cycling performance of the eutectic Sn-Ag (Sn-3.5Ag) solder versus eutectic Pb-Sn (63Sn-37Pb). Test boards were fabricated to analyze the performance of both electroless Ni/immersion Au (ENIG) and copper organic solderability preservative (Cu-OSP) pad surface finishes. Samples were characterized for thermal, electrical, and mechanical response to the test conditions, including both static and dynamic Moire interferometry, and metallographic cross sectioning at several read points. It was found that the Pb-free Sn-3.5Ag BGA alloy exhibited superior performance throughout the entire range of testing.

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Implementation of Cu metallization for high-speed, fine geometry IC devices is progressing rapidly throughout the industry. Due to the metallurgical constraints associated with this material, it is necessary to provide for barrier and top metal layers suited to the interconnect technology of choice (i.e., flip chip or wire bond). In the case of products intended for wire bonding, the Cu is generally coated first with a diffusion barrier layer such as TaN, which is then topped off with Al or an Al-rich alloy to form the final interconnect level. In addition to the well-characterized effect of various alloying elements such as Si and Cu upon the chemical and mechanical stability of the Al metal layer, the presence of the underlying Cu and barrier metal layers has been found to influence the formation of defects on the bond pad surface. Specifically, residual stresses associated with metal layer deposition and CMP processes have been found to influence the formation of hillock and pit hole defects in the final metal layer. This paper explores the mechanisms of formation for these kinds of surface defects in a bond pad stack consisting of approximately 12k angstroms of Al-0.5%Cu atop approximately 9k angstroms of Cu, separated by a thin layer of Ta. The impact of these defects on the assembly interconnection process, and their tendency to provide nucleation sites for moisture-induced corrosion, are characterized. Wafer fabrication processes having a direct impact on defect formation are reviewed, along with potential defect-reduction methods.