Abstract. The article presents a number of posturographic methods enabling objective postural symmetry assessment in patients undergoing rehabilitation after total hip replacement surgery. The key goal of such rehabilitation is fast restoration of a proper body weight distribution. The postural symmetry measures proposed in the article enable generalized quantification of the CoP (Center of Pressure) trajectories measured during standard static posturography diagnostics and the so-called follow-up posturography examination. The follow-up posturography is a relatively new but promising method of physical rehabilitation. All of the herein discussed posturographic measures have been designed specifically to quantify postural symmetry either in a standing and relaxed upright position, in the absence of any deterministic external stimulation (static posturography) or in the presence of a visual biofeedback stimulation enforcing the coordinated slow swaying movements of the body (the follow-up posturography). The experimental results presented in this paper constitute the outcome of the long-term cooperation between the Institute of Electronics of the Silesian University of Technology and the Silesian Rheumatology and Rehabilitation Hospital. The usefulness of the proposed postural symmetry measures has been verified in a series of clinical trials carried out in a selected group of patients undergoing rehabilitation after total hip replacement surgery.

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One of the main aspects of logic synthesis dedicated to FPGA is the problem of technology mapping, which is directly associated with the logic decomposition technique. This paper focuses on using configurable properties of CLBs in the process of logic decomposition and technology mapping. A novel theory and a set of efficient techniques for logic decomposition based on a BDD are proposed. The paper shows that logic optimization can be efficiently carried out by using multiple decomposition. The essence of the proposed synthesis method is multiple cutting of a BDD. A new diagram form called an SMTBDD is proposed. Moreover, techniques that allow finding the best technology mapping oriented to configurability of CLBs are presented. In the experimental section, the presented method (MultiDec) is compared with academic and commercial tools. The experimental results show that the proposed technology mapping strategy leads to good results in terms of the number of CLBs.

Abstract. The main goal of the paper is to present a logic synthesis strategy dedicated to an LUT-based FPGA. New elements of the proposed synthesis strategy include: an original method of function decomposition, non-disjoint decomposition, and technology mapping dedicated to configurability of logic blocks. The aim of all of the proposed synthesis approaches is the sharing of appropriately configured logic blocks. Innovation of the methods is based on the way of searching decomposition, which relies on multiple cutting of an MTBDD diagram describing a multi-output function. The essence of the proposed algorithms rests on the method of unicoding dedicated to sharing resources, searching non-disjoint decomposition on the basis of the partition of root tables, and choosing the levels of diagram cutting that will guarantee the best mapping to complex logic blocks. The methods mentioned above were implemented in the MultiDec tool. The efficiency of the analyzed methods was experimentally confirmed by comparing the synthesis results with both academic and commercial tools.Key words: BDD, decomposition, logic synthesis, technology mapping. Decomposition of multi-output functions orientedto configurability of logic blocks There are the methods of function technology mapping in LUT-based FPGA structures in which a classic model of decomposition plays a crucial role. A classic model of decomposition may also be one of the elements of synthesis dedicated to CPLD structures [18][19][20]. In fact, it is the basis of function synthesis reflected in LUT-based FPGA structures. Sometimes, logic synthesis method is targeted at FPGA architectures with specialized embedded memory blocks (EMB) [21,22]. In all cases, decomposition of Boolean functions turns out to be a key problem. Decomposition of multi-output functions leads to better results than decomposition done separately on each single function. It is because of the fact that shared blocks are the result of decomposition of Boolean functions and are used by several single-output functions at the same time. A classic model of decomposition is the basis of a series of decomposition algorithms [5,[23][24][25]. Synthesis methods use various graph algorithms that enable indication of column multiplicity of partition tables or a proper transformation of Boolean functions. Undoubtedly, one of the main advantages of a classic function decomposition is the natural admitting of don't-care states. It is probably the most important element making these methods one of the most effective. In last years, a series of various synthesis