This article describes growth and characterization of the highest quality reproducible 3C-SiC heteroepitaxial films ever reported. By properly nucleating 3C-SiC growth on top of perfectly on-axis (0001) 4H-SiC mesa surfaces completely free of atomic scale steps and extended defects, growth of 3C-SiC mesa heterofilms completely free of extended crystal defects can be achieved. In contrast, nucleation and growth of 3C-SiC mesa heterofilms on top of 4H-SiC mesas with atomic-scale steps always results in numerous observable dislocations threading through the 3C-SiC epilayer. High-resolution X-ray diffraction (HRXRD) and high resolution cross-sectional transmission electron microscopy (HRXTEM) measurements indicate non-trivial, in-plane, lattice mismatch between the 3C and 4H layers. This mismatch is somewhat relieved in the step-free mesa case via misfit dislocations confined to the 3C/4H interfacial region without dislocations threading into the overlying 3C-SiC layer. These results indicate that the presence or absence of steps at the 3C/4H heteroepitaxial interface critically impacts the quality, defect structure, and relaxation mechanisms of single-crystal heteroepitaxial 3C-SiC films.

Extreme temperature semiconductor integrated circuits (ICs) are being developed for use in the hot sections of aircraft engines and other harsh‐environment applications well above the 300 °C effective limit of silicon‐on‐insulator IC technology. This paper reviews progress by the NASA Glenn Research Center and Case Western Reserve University (CWRU) in the development of extreme temperature (up to 500 °C) integrated circuit technology based on epitaxial 6H‐SiC junction field effect transistors (JFETs). Simple analog amplifier and digital logic gate ICs fabricated and packaged by NASA have now demonstrated thousands of hours of continuous 500 °C operation in oxidizing air atmosphere with minimal changes in relevant electrical parameters. Design, modeling, and characterization of transistors and circuits at temperatures from 24 °C to 500 °C are also described. CWRU designs for improved extreme temperature SiC JFET differential amplifier circuits are demonstrated. Areas for further technology maturation, needed prior to beneficial system insertion, are discussed. (© 2009 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

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Lateral homoepitaxial growth of thin cantilevers emanating from mesa patterns that were reactive ion etched into on-axis commercial SiC substrates prior to growth is reported. The thin cantilevers form after pure stepflow growth removes almost all atomic steps from the top surface of a mesa, after which additional adatoms collected by the large step-free surface migrate to the mesa sidewall where they rapidly incorporate into the crystal near the top of the mesa sidewall. The lateral propagation of the step-free cantilevered surface is significantly affected by pregrowth mesa shape and orientation, with the highest lateral expansion rates observed at the inside concave corners of V-shaped pregrowth mesas with arms lengthwise oriented along the ͗1100͘ direction. Complete spanning of the interiors of V's and other mesa shapes with concave corners by webbed cantilevers was accomplished. Optical microscopy, synchrotron white beam x-ray topography and atomic force microscopy analysis of webbed regions formed over a micropipe and closed-core screw dislocations show that c-axis propagation of these defects is terminated by the webbing. Despite the nonoptimized process employed in this initial study, webbed surfaces as large as 1.4ϫ10 Ϫ3 cm 2 , more than four times the pregrowth mesa area, were grown. However, the largest webbed surfaces were not completely free of bilayer steps, due to unintentional growth of 3C-SiC that occurred in the nonoptimized process. Further process optimization should enable larger step-free webs to be realized.

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