Summary Low‐power devices are usually highly constrained in terms of CPU computing power, memory, and GPGPU resources for real‐time applications to run. In this paper, we describe RAPID, a complete framework suite for computation offloading to help low‐powered devices overcome these limitations. RAPID supports CPU and GPGPU computation offloading on Linux and Android devices. Moreover, the framework implements lightweight secure data transmission of the offloading operations. We present the architecture of the framework, showing the integration of the CPU and GPGPU offloading modules. We show by extensive experiments that the overhead introduced by the security layer is negligible. We present the first benchmark results showing that Java/Android GPGPU code offloading is possible. Finally, we show the adoption of the GPGPU offloading into BioSurveillance, a commercial real‐time face recognition application. The results show that, thanks to RAPID, BioSurveillance is being successfully adapted to run on low‐power devices. The proposed framework is highly modular and exposes a rich application programming interface to developers, making it highly versatile while hiding the complexity of the underlying networking layer.

With the emergence of GPU computing, deep neural networks have become a widely used technique for advancing research in the field of image and speech processing. In the context of object and event detection, slidingwindow classifiers require to choose the best among all positively discriminated candidate windows. In this paper, we\ud introduce the first GPU-based non-maximum suppression (NMS) algorithm for embedded GPU architectures. The obtained results show that the proposed parallel algorithm reduces the NMS latency by a wide margin when compared to CPUs, even clocking the GPU at 50% of its maximum frequency on an NVIDIA Tegra K1. In this paper, we show\ud results for object detection in images. The proposed technique is directly applicable to speech segmentation tasks such as speaker diarization.Peer ReviewedPostprint (published version

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The AXIOM project (Agile, eXtensible, fast I/O Module) aims at researching new software/hardware architectures for the future Cyber-Physical Systems (CPSs). These systems are expected to react in real-time, provide enough computational power for the assigned tasks, consume the least possible energy for such task (energy efficiency), scale up through modularity, allow for an easy programmability across performance scaling, and exploit at best existing standards at minimal costs.Peer ReviewedPostprint (published version

People and objects will soon share the same digital network for\ud information exchange in a world named as the age of the\ud cyber-physical systems.\ud The general expectation is that people and\ud systems will interact in real-time. This poses pressure onto systems\ud design to support increasing demands on computational power, while\ud keeping a low power envelop. Additionally, modular scaling and easy\ud programmability are also important to ensure these systems to become\ud widespread. The whole set of expectations impose scientific and\ud technological challenges that need to be properly addressed.\ud \ud The AXIOM project (Agile, eXtensible, fast I/O Module)\ud will research new hardware/software architectures for cyber-physical\ud systems to meet such expectations. The technical approach aims\ud at solving fundamental problems to enable easy programmability of\ud heterogeneous multi-core multi-board systems. AXIOM proposes the use\ud of the task-based OmpSs programming model, leveraging low-level\ud communication interfaces provided by the hardware. Modular scalability\ud will be possible thanks to a fast interconnect embedded into each\ud module. To this aim, an innovative ARM and FPGA-based board will be\ud designed, with enhanced capabilities for interfacing with the physical\ud world. Its effectiveness will be demonstrated with key scenarios such as\ud Smart Video-Surveillance and Smart Living/Home (domotics)