In this paper we propose an application-level power consumption modeling and optimization technique for mobile devices. The application being considered is modeled as a FSM and the power consumption figures are associated with it through current measurements on selected states, followed by the application of a linear functional model. The FSM model is then used, together with a power management policy, to extend battery lifetime while guaranteeing the execution of essential states in the application. In this paper, the methodology is applied to a specific case study, namely the fruition of multimedia content in an E-Learning scenario.

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Abstract-In this paper we address the problem of the architectural exploration from the energy/performance point of view of a VLIW processor for embedded systems. We also consider an architectural modification we introduced in order to extend the reference processor so that it can exploit both instruction level parallelism and thread level parallelism. A power model obtained by applying an instruction-level power estimation technique is presented and validated with experimental results. This power model was plugged in a parametric cycle-accurate simulator in order to support architectural exploration. Experimental results derived from the proposed framework show a comparison among different implementations of the reference processor: single and dual cluster implementations, and dual cluster with multithreaded extension.

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