The progress of charge manipulation in semiconductor-based nanoscale devices opened up a novel route to realise a flying qubit with a single electron. In the present review, we introduce the concept of these electron flying qubits, discuss their most promising realisations and show how numerical simulations are applicable to accelerate experimental development cycles. Addressing the technological challenges of flying qubits that are currently faced by academia and quantum enterprises, we underline the relevance of interdisciplinary cooperation to move emerging quantum industry forward. The review consists of two main sections:Pathways towards the electron flying qubit: We address three routes of single-electron transport in GaAs-based devices focusing on surface acoustic waves, hot-electron emission from quantum dot pumps and Levitons. For each approach, we discuss latest experimental results and point out how numerical simulations facilitate engineering the electron flying qubit.Numerical modelling of quantum devices: We review the full stack of numerical simulations needed for fabrication of the flying qubits. Choosing appropriate models, examples of basic quantum mechanical simulations are explained in detail. We discuss applications of open-source (KWANT) and the commercial (nextnano) platforms for modelling the flying qubits. The discussion points out the large relevance of software tools to design quantum devices tailored for efficient operation.

-From man-made satellites and interplanetary missions to fusion power plants, electronic equipment that needs to withstand various forms of irradiation is an essential part of their operation. Examination of total ionizing dose (TID) effects in electronic equipment can provide a thorough means to predict their reliability in conditions where ionizing dose becomes a serious hazard. In this paper, we provide a historical overview of logic and memory technologies that made the biggest impact both in terms of their competitive characteristics and their intrinsically hardened nature against TID. Further to this, we also provide guidelines for hardened device designs and present the cases where hardened alternatives have been implemented and tested in the lab. The technologies that we examine range from silicon-on-insulator and FinFET to 2-D semiconductor transistors and resistive random access memory.Index Terms-2-D semiconductor, carbon, CMOS, deep submicrometer, FinFET, graphene, MoS2, resistive random access memory (RRAM), silicon-on-insulator (SOI), thin film, total ionizing dose (TID), ultrathin buried oxide (UTBOX).

No abstract