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The cascaded H-bridge multilevel inverter (CHMI) is a modular structure that consists of many power semiconductor switches. With this increase in the number of power semiconductor switches, it is hard to predict and handle the failure of the devices, and hence reliability of CHMI decreases. The major cause of power semiconductor switch failure is junction temperature that is produced by power losses. The study proposes a multi-carrier pulse-width modulation (PWM) scheme for reduction in switching losses of CHMI. In the proposed modulation scheme, the two legs conduct switching operation at different frequencies for switching reduction. One leg conducts switching operation with high frequency, while the other leg conducts switching operation with fundamental frequency. The switching operations with different frequencies cause unbalanced switching loss to each leg. Therefore, the junction temperature that is based on power losses leads to different lifetimes for the power semiconductor switch. Additionally, the switching frequency of the two legs is alternated to evenly distribute switching losses and junction temperature. Simulation and experimental results verify the performance of the proposed PWM scheme. INDEX TERMS Cascaded H-bridge multilevel inverter, phase-shifted pulse-width modulation scheme, reliability of power semiconductor switch, switching loss reduction. SEOK-MIN KIM (Graduate Student Member, IEEE) received the B.S. degree in electronic engineering from Sejong University, Seoul, South Korea, in 2013, and the M.S. degree in space survey information technology and the Ph.D. degree in electrical and computer engineering from