Tunneling measurements were taken on a hydrogen terminated, 2×1 reconstructed, Si(100) surface, formed by an in situ passivation technique. I–V characteristics on this surface are shown to be sensitive to the electronic structure at atomic length scales. Tunneling measurements across a pn junction clearly delineate a transition of width in close agreement with that predicted by process and device simulators. In contrast, a scanning capacitance microscopy profile on the same sample exhibits a significantly larger transition width.

An analysis of a ternary single electron tunneling phase logic element is presented. The analysis is based on Monte Carlo simulations and an analytical treatment of a resistively loaded tunneling junction at low temperatures. We show that tristable operation can be obtained over a 19% dc bias operating range by optimizing the pump frequency and amplitude. For large ac frequencies, our optimizations also show that simple linear relationships exist between the optimal parameters (the optimal dc bias and pump amplitude) and frequency. Finally, we show that the ternary phase state of a clocked element can be controlled by an input signal provided that the clock turn-on is not too abrupt. The results should be of use in the design of ternary and other multilevel tunneling phase logic families.