Attempts have been made to present a 32bit direct digital frequency synthesizer (DDFS) with a new ROM compression method based on the trigonometric identities of the sine function. In our proposed DDFS architecture 128 sinusoidal samples (1664 bits) are stored in the ROM and the other samples between these consecutive samples are obtained by using a 7×7 multiplier and a scaling block. This architecture was simulated at the system level by MATLAB Simulink and the results were mentioned. By using this algorithm, a very high compression ratio (551.3:1) and the spurious free dynamic range (SFDR) of 85dbc are resulted.Key Words: compression ratio, phase to sineamplitude conversion, quadrant phase, quarter symmetry, spurious free dynamic range (SFDR).
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