Leakage currents through the gate dielectric of thin film transistors remain a roadblock to the fabrication of organic field-effect transistors (OFETs) on ultrathin dielectrics. We report the first investigation of a self-assembled monolayer (SAM) dipole as an electrostatic barrier to reduce leakage currents in n-channel OFETs fabricated on a minimal, leaky ∼10 nm SiO2 dielectric on highly doped Si. The electric field associated with 1H,1H,2H,2H-perfluoro-octyltriethoxysilane (FOTS) and octyltriethoxysilane (OTS) dipolar chains affixed to the oxide surface of n-Si gave an order of magnitude decrease in gate leakage current and subthreshold leakage and a two order-of-magnitude increase in ON/OFF ratio for a naphthalenetetracarboxylic diimide (NTCDI) transistor. Identically fabricated devices on p-Si showed similarly reduced leakage and improved performance for oxides treated with the larger dipole FOTS monolayer, while OTS devices showed poorer transfer characteristics than those on bare oxide. Comparison of OFETs on both substrates revealed that relative device performance from OTS and FOTS treatments was dictated primarily by the organosilane chain and not the underlying siloxane-substrate bond. This conclusion is supported by the similar threshold voltages (VT) extrapolated for SAM-treated devices, which display positive relative VT shifts for FOTS on either substrate but opposite VT shifts for OTS treatment on n-Si and p-Si. Our results highlight the potential of dipolar SAMs as performance-enhancing layers for marginal quality dielectrics, broadening the material spectrum for low power, ultrathin organic electronics.

We describe a catalyst-free vapor-solid synthesis of bismuth selenide (Bi 2 Se 3 ) nanostructures at ambient pressure with H 2 as carrier gas. The nanostructures were synthesized on glass, silicon and mica substrates and the method yields a variety of nanostructures: nanowires, nanoribbons, nanoplatelets and nanoflakes. The materials analysis shows high chemical purity in all cases, without sacrificing the crystalline structure of Bi 2 Se 3 . Lowtemperature measurements of the nanostructures indicate contributions from the surface states with a tunable carrier density. Samples synthesized on flexible mica substrates show no significant change in resistance upon bending, indicating robustness of as-grown Bi 2 Se 3 nanostructures and their suitability for device applications.

Lateral organic field-effect transistors (OFETs), consisting of a polystyrene (PS) polymer gate material and a pentacene organic semiconductor (OSC), were electrically polarized from bias stress during operation or in a separate charging step, and investigated with scanning Kelvin probe microscopy (SKPM) and current-voltage determinations. The charge storage inside the polymer was indicated, without any alteration of the OFET, as a surface voltage with SKPM, and correlated to a threshold voltage (VT) shift in the transistor operation. The SKPM method allows the gate material/OSC interface of the OFET to be visualized and the surface voltage variation between the two gate material interfaces to be mapped. The charge distribution for three samples was derived from the surface voltage maps using Poisson's equation. Charge densities calculated this way agreed with those derived from the VT shifts and the lateral gate-OSC capacitance. We also compared the behavior of two other polymers with PS: PS accepted the most static charge in its entire volume, poly(2-trifluoromethylstyrene) (F-PS) had the most stability to bias stress, and poly(methyl methacrylate) (PMMA) showed the most leakage current and least consistent response to static charging of the three polymers. This work provides a clear demonstration that surface voltage on a working OFET gate material can be related to the quantity of static charge responsible for bias stress and nonvolatility in OFETs.

Charge carriers trapped in polystyrene (PS) were investigated with Kelvin probe microscopy (KPM) and thermally stimulated discharge current (TSDC). Lateral heterojunctions of pentacene/PS were scanned using KPM, effectively observing polarization along a side view of a lateral nonvolatile organic field-effect transistor dielectric interface. TSDC was used to observe charge migration out of PS films and to estimate the trap energy level inside the PS, using the initial rise method.

Polycrystalline thin films of tellurium and organic semiconductor molecules are paired in heterostructured field-effect transistors built on Si/SiO2 substrates. While charge carrier mobilities can exceed 1 cm(2)/(V s), there is only a limited gate voltage range over which the current is modulated. We employ continuous and pulsed measurements on transistors to explore the influence of charge equilibration time on device behavior, finding that pulsed gating improves output characteristics. We also use surface potential measurements to investigate the interfacial vacuum level offset between materials, and we modify the interlayer potential profile by interposing statically charged dielectric layers on the silicon dioxide. We show that interfacial fields determine the gate voltage range over which Te shows a field effect in heterostructures with organic semiconductors and that modification of these fields can extend this range.