Abstract-In this letter, we report metal nanocrystal (NC)-basedFlash memory devices with single-layer (SL) and dual-layer (DL) Pt NCs as the storage element. The devices are fabricated using CMOS compatible process flow with optimized low-leakage high-k Al 2 O 3 as the control dielectric. Large memory window (10 V for SL and 15 V for DL devices) is observed due to overerase, which increases the overall window. Improvement in DL memory window is found to be due to 1.5 times improvement in total stored charge over SL. Excellent high-temperature precycling retention is observed both for SL and DL devices.Index Terms-Dual layer (DL), flash memory, metal nanocrystal (NC).

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Abstract-Memory window (MW) and the retention of singlelayer (SL) and dual-layer (DL) platinum (Pt) nanocrystal (NC) devices are extensively studied before and after program/erase (P/E) cycling. DL devices show better charge storage capability and reliability over the SL devices. Up to 50% improvement in the stored charge is estimated in the DL device over SL when P/E is performed at equal field. Excellent high temperature and postcycling retention capabilities of SL and DL devices are shown. The impact of the interlayer film (ILF) thickness on the retention of the DL structure is reported. While SL devices show poor P/E cycling endurance, DL cycling is shown to meet the minimum requirements of the multilevel cell (MLC) operation.

Most of the current high-density Flash cells use multilevel-cell (MLC) technology to store 2-bits/cell to increase memory density. In this work, dual layer metal nanocrystal (NC) flash EEPROM device, with large memory window, good retention and 10 4 cycle endurance is reported. High-temperature retention, gate bias accelerated retention, read disturb and postcycling retention measurements show excellent reliability of the NC devices which make them suitable for the MLC application.

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