A metal-oxide-semiconductor field-effect transistor (MOSFET) with transparent ZnO as its gate metal was fabricated and its photodetecting capabilities were investigated. For the fabrication of the MOSFET, a four level mask was used. The first level was used for making the diffusion wells for source and drain. The second level to form the via holes for Aluminum deposition followed by the third level to shape the source and drain contact structures. The ZnO gate metal was then deposited by sputtering process. Finally the fourth level mask was used to pattern the ZnO gate metal. The electrical characteristic analysis was performed on the fabricated MOSFETs when different types of light were incident on it.
Copper indium oxide (Cu2In2O5) thin films were deposited by the RF magnetron sputtering technique using a Cu2O:In2O3 target. The films were deposited on glass and quartz substrates at room temperature. The films were subsequently annealed at temperatures ranging from 100 to 900 °C in an O2 atmosphere. The X-ray diffraction (XRD) analysis performed on the samples identified the presence of Cu2In2O5 phases along with CuInO2 or In2O3 for the films annealed above 500 °C. An increase in grain size was identified with the increase in annealing temperatures from the XRD analysis. The grain sizes were calculated to vary between 10 and 27 nm in films annealed between 500 and 900 °C. A morphological study performed using SEM further confirmed the crystallization and the grain growth with increasing annealing temperatures. All films displayed high optical transmission of more than 70% in the wavelength region of 500–800 nm. Optical studies carried out on the films indicated a small bandgap change in the range of 3.4–3.6 eV during annealing.
Copper indium oxide (CuInOx) thin films were deposited by the RF magnetron sputtering technique using a Cu2O:In2O3 target at varying substrate temperatures up to 400 °C. Mutually exclusive requirements of having a p-type thin film along with increased conductivity and high transparency were achieved by controlling the migration of indium oxide phases during the sputtering process, as verified by the XPS studies. A morphological study performed using SEM further confirmed the crystallization and the grain growth (95–135 nm) with increasing substrate temperatures, resulting in superior conductivity and an enhanced transparency of more than 70% in the 400–700 nm range. This is due to the controlled replacement of copper sites with indium while maintaining the p-type characteristic of the thin film. Optical studies carried out on the films indicated a bandgap change in the range of 2.46–2.99 eV as a function of substrate heating. A p-CuInOx/n-Si heterojunction was fabricated with a measured knee voltage of 0.85 V. The photovoltaic behavior of the device was investigated and initial solar cell parameters are reported.
The ever increasing advancements in semiconductor technology and continuous scaling of CMOS devices mandate the need for new dielectric materials with low-k values. The interconnect delay can be reduced not only by the resistance of the conductor but also by decreasing the capacitance of dielectric layer. Also cross-talk is a major issue faced by semiconductor industry due to high value of k of the inter-dielectric layer (IDL) in a multilevel wiring scheme in Si ultra large scale integrated circuit (ULSI) devices. In order to reduce the time delay, it is necessary to introduce a wiring metal with low resistivity and a high quality insulating film with a low dielectric constant which leads to a reduction of the wiring capacitance. Boron carbon nitride (BCN) films are prepared by reactive magnetron sputtering from a B4C target and deposited to make metal-insulator-metal (MIM) sandwich structures using aluminum as the top and bottom electrodes. BCN films are deposited at various N2/Ar gas flow ratios, substrate temperatures and process pressures. The electrical characterization of the MIM devices includes capacitance vs. voltage (C-V), current vs voltage, and breakdown voltage characteristics. The above characterizations are performed as a function of deposition parameters. iv To my grandfather late Mr. H Hanumanthaiah and my parents v ACKNOWLEDGMENTS I would like to thank my advisor, Dr. Kalpathy B Sundaram, for his continuous commitment to help and support me through my graduate career. His advice, technical and otherwise, has been valuable to my experience as a graduate student and a s a person. I would also like to thank my committee members, Dr. Jiann S Yuan and Dr. Mingjie Lin, for their support throughout my years at UCF. My heartfelt gratitude goes out to all of my colleagues at the lab-Giji Skaria, Ritika Oswal. Giji was very much instrumental in helping me to perform Vacuum Evaporation experiments and some basic electrical debugging. I would like to thank my father Mr. H Prakash and my mother Mrs. Asha Prakash for their constant motivation and for instilling confidence in me at every step. Also I would like to thank my sister Ms. Ananya Prakash for her love and support. And last but not the least I would like to thank my grandparents and all my relatives and friends who stood by my side during ups and downs of my academic life here.
Dielectrics play an important role in semiconductor devices when it is used as gate insulator MOS transistors or in memory applications [1]. SiO2 has been one of the most typically used dielectrics due to its good properties like electrical and thermodynamic stability. It provides a great Si-SiO2 interface used in MOS transistors, and has high quality isolation electrical characteristic. Despite its benefits, there comes a point where continuous device scaling sets a limit to what materials can be used. Therefore, other high-k gate dielectric materials have to be found in order to go below 1.5nm thickness when SiO2 is used for the 45nm node technology. ZrO2 is one of the high-k materials that can be used as a possible solution [2]. ZrO2 possesses some interesting characteristics like relatively high-k and wide bandgap. In addition, its crystal structure changes at different temperatures, going from monoclinic to tetragonal and then to cubic as the temperature raises. Even though the monoclinic structure is stable and occurs at room temperature, the other two are not. This presents some problems, which create phase instability leading to stresses and cracking of the material. However, by introducing certain rare earth oxide based dopants as for example Yttria (Y2O3), stable phases for the tetragonal and cubic structures can be achieved, as well as increasing the permittivity constant of the dielectric [3,4]. In this work, ZrO2 thin films are deposited on glass substrates to find various properties. The films are prepared in an RF magnetron sputtering system using a 99.5% pure yttria-stabilized zirconium oxide target. ZrO2 based metal/insulator/metal (MIM) structures are fabricated using Aluminum as the top and bottom electrodes. Various electrical properties are investigated for the ZrO2 films prepared under different deposition and annealing conditions. REFERENCES [1] G. D. Wilk, R. M. Wallace, J. M. Anthony, “High-κ gate dielectrics: Current status and materials properties considerations” Journal of Applied Physics, Vol 89, 2001 [2] M. K. Bera, C. K. Maiti, "Reliability of Ultra-thin Zirconium Dioxide (ZrO2) Films on Strained-Si" Physical and Failure Analysis of Integrated Circuits, 2006. [3] S. M. Hwang, S. M. Lee, K. Park, M. S. Lee, J. Joo, J. H. Lim, H. Kim, J. J. Yoon, Y. D. Kim “Effect of annealing temperature on microstructural evolution and electrical properties of sol-gel processed ZrO2 /Si films” Applied Physics Letters 98, 2011 [4] H. García, H. Castán, S. Dueñas, E. Pérez, L. Bailón, “Electrical characterization of MIS capacitors based on DY203-doped Zr02 dielectrics”, Electron Devices (CDE), 2015
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