No abstract

No abstract

No abstract

According to the trend towards high-resolution CMOS image sensors, pixel sizes are continuously shrinking, towards and below 1.0μm, and sizes are now reaching a technological limit to meet required SNR performance [1][2]. SNR at low-light conditions, which is a key performance metric, is determined by the sensitivity and crosstalk in pixels. To improve sensitivity, pixel technology has migrated from frontside illumination (FSI) to backside illumiation (BSI) as pixel size shrinks down. In BSI technology, it is very difficult to further increase the sensitivity in a pixel of near-1.0μm size because there are no structural obstacles for incident light from micro-lens to photodiode. Therefore the only way to improve low-light SNR is to reduce crosstalk, which makes the non-diagonal elements of the color-correction matrix (CCM) close to zero and thus reduces color noise [3]. The best way to improve crosstalk is to introduce a complete physical isolation between neighboring pixels, e.g., using deep-trench isolation (DTI). So far, a few attempts using DTI have been made to suppress silicon crosstalk. A backside DTI in as small as 1.12μm-pixel, which is formed in the BSI process, is reported in [4], but it is just an intermediate step in the DTIrelated technology because it cannot completely prevent silicon crosstalk, especially for long wavelengths of light. On the other hand, front-side DTIs for FSI pixels [5] and BSI pixels [6] are reported. In [5], however, DTI is present not only along the periphery of each pixel, but also invades into the pixel so that it is inefficient in terms of gathering incident light and providing sufficient amount of photodiode area. In [6], the pixel size is as large as 2.0μm and it is hard to scale down with this technology for near 1.0μm pitch because DTI width imposes a critical limit on the sufficient amount of photodiode area for full-well capacity. Thus, a new technological advance is necessary to realize the ideal front DTI in a small size pixel near 1.0μm.In our work, a small pixel with fully surrounding and full-depth DTI is demonstrated. As shown in Fig. 7.1.1, in the conventional 2-dimensional (2D) pixel structure, if DTI is placed along the periphery of each pixel, the effective photodiode area is reduced by the amount of DTI width in addition to the fixed pixel transistor area. In a pixel size near 1.0μm, there is little area remaining for a photodiode and full-well capacity. In this paper, to overcome the small photodiode fill factor by the presence of DTI, a vertical transfer gate (VTG) and buried photodiode are combined with front DTI technology, forming a 3-dimensional (3D) pixel, which is realized in a single wafer, contrary to the previous silicon stack structure [7]. In this 3D pixel, transistors and photodiode are separated. Transistors are present in the silicon surface plane, as in conventional 2D pixels, but the photodiode is placed and buried beneath the transistor plane. A VTG connects both planes (photodiode and transistors) and thus accumulated charges in the bur...

Larger value of bias current leads to lower carrier lifetime (see expression for N ) and hence lower RC time constant. The capacitor in Figure 1(a) is effective during transient, but plays no role to limit the steady values of gain.A typical plot of frequency response versus the frequency of the modulating current is shown in Figure 7. When no parasitic element is included, the bandwidth is as high as 1.59 GHz, when I bias ϭ 40 mA, I ac ϭ 10 mA, input power ϭ Ϫ35 dBm and carrier lifetime ϭ 100 ps. With decrease of carrier lifetime dc gain as well as small signal gain decreases. When parasitic elements are included in the circuit, bandwidth is reduced, the values of which are mainly limited by the series resistance R s and total shunt capacitance C S . The parameters used are: R p ϭ 10 ⍀, L p ϭ 10 nH, R d ϭ 1 ⍀, R sh ϭ 1 M⍀, and reverse saturation current I s ϭ 0.3856 A. The frequency response has been shown in Figure 7 for C S ϭ 5 and 10 pF; the values of corresponding bandwidth are 0.64 and 0.395 GHz, respectively. These results could not be compared with any measured values due to nonavailability of data. CONCLUSIONSA circuit model for TW-SLA has been developed using PSpice simulation techniques. In this circuit steady state and dynamic behaviors of SLA are modeled. The results of the circuit analysis are in close agreement with measured results and the results from numerical analysis of TW-SLA. The present time domain lumped circuit model can include electrical parasitics. As the rate equation parameters are related with the circuit elements the effects of changing them on the performance of TW-SLA can be examined quite easily. [7,8]. In particular, the advantage of wide-slot antennas is their wide operating bandwidth, especially for those with a modified tuning stub, such as the fork-like tuning stub [9 -13]. However, although many microstrip-fed wide-slot antennas have been proposed for triple-band applications, studies on the triangular slot antenna with fork-like tuning stub for triple-band applications are rare.In this article, we report the study of a new triangular slot antenna design with a fork-like tuning stub for triple-band operation, and we also investigated the radiation characteristics of such a design. The fork-like tuning stub studied here is all positioned within the slot region in the opposite side of the printed triangular slot. Through proper selection of the parameters of the fork-like tuning stub, it can be expected that the coupling between the fork-like tuning stub and printed triangular slot can be controlled more effectively, which makes triple-band operation possible with the triangular slot antenna. The antenna was fabricated with the use of a conventional RF-4 material, which is often used in making printed circuit boards and is therefore easy to manufacture. The results of the experiment conducted on the antenna's broadband impedance bandwidth, radiation pattern, and gain are discussed in detail below. ANTENNA DESIGNThe schematic configuration of the proposed antenna design for...