The stacking faults grown into silicon during thermal oxidation were shrunk by high temperature heat-treatment in a nitrogen atmosphere. The activation energy for fault shrinkage was 5.2 eV, and nearly equal to that of silicon self-diffusion, 5.13 eV. The shrinkage phenomenon is due to the removal of silicon atoms, which form the stacking faults of extrinsic type, by diffusion via vacancies. Therefore the shrinkage rate depends on the vacancy concentration" in silicon. The high concentration diffusion of boron, phosphorus, and arsenic in silicon generates the excess vacancies induced by donor doping, or by the stress due to solute lattice contraction of the impurity. The shrinkage of stacking faults by these excess vacancies was investigated. The faults shrank rapidly and disappeared for a short time in comparison with simple heat-treatment. The annihilation of stacking faults in silicon was also influenced by the coulomb interaction or the complex formation between the negatively charged vacancy and impurity.Thermal oxidation is one of the important processes in the manufacture of silicon planar transistors and other devices. Crystallographic defects such as stacking faults are often introduced in silicon in this oxidation process (1-5). When stacking faults lie across a p-n junction, excess reverse leakage currents in the junction are increased (6). Therefore, it is necessary to suppress stacking fault generation. If a crystal free from mechanical damage and grown-in defects, which act as the nucleation, is used, stacking faults are not generated. However, it is difficult to obtain such a crystal. Accordingly, the suppression of stacking fault generation and shrinkage of the faults by HC1 oxidation (7), or the preoxidation gettering of silicon wafers by misfit dislocations due to phosphorus diffusion (8), etc. have been carried out. Stacking faults also can be shrunk by high temperature heat-treatment (9).In this study, the shrinkage of stacking faults was investigated first. It was found that the shrinkage related intimately to the vacancy concentration in silicon. The vacancy concentration depends not only on treatment temperature, but also on impurity doping. And so the relation between the annihilation of stacking faults and the excess vacancies which were ~nduced during impurity diffusion into silicon was studied, and the mechanism of the annihilation is discussed. ExperimentalThe specimen wafers used in these experiments were 1-5 ~-cm (100) oriented dislocation-free silicon crystals grown by the Czochralski method. They were doped with phosphorus for n-type and boron for ptype. The surface was mechanically polished and the thickness was about 250 ~m. After appropriate treatments, they were etchd in a HF:HNO3 = 1:5 solution for 2 min to remove the surface mechanical damage. The oxidation of silicon was carried out at 1200~ in dry oxygen for 210 min. This thermal oxidation grew a stacking fault in the silicon crystal about 40 ~m long, provided that the fault size was defined as the fault length on the silic...

It was found that diffusion of arsenic, and boron underneath the arsenic-diffused layer, was accelerated during low-temperature heat treatment. This diffusivity is extremely large in comparison to the normal one, and depends on the treatment time. The effective diffusion coefficients of arsenic at 700 °C are 1×10−16 cm2/sec for 5 h and 7×10−18 cm2/sec for 170 h. Such a phenomenon may be due to the excess vacancies formed during these treatments. This effect also causes the emitter dip effect in the npn transistor using arsenic for the emitter impurity.

When arsenic is used as the emitter diffusant in a n-p-n silicon transistor, it is well known that the emitter dip effect is not observed. However, it was found that the diffusion of boron underneath the arsenic emitter was accelerated during heat-treatment at 500~176This phenomenon is related to abnormal behavior of arsenic in silicon. The diffusion of arsenic is enhanced by such treatment. The anomalous diffusion of arsenic depends on treatment time, and is remarkable in the beginning of the treatment. The diffusivity is extremely large in comparison with the normal one extrapolated from high temperature data. It is considered that this anomaly is caused by the generation of excess vacancies during such treatment. The emitter dip effect is also caused by these excess vacancies during heat-treatment at relatively low temperature.Arsenic is generally used as the emitter diffusant for a microwave n-p-n silicon transistor. The arsenic emitter avoids the emitter dip effect, and the carrier profile is suitable in comparison with phosphorus. The covalent radius of arsenic is nearly equal to that of silicon. Therefore, the lattice strain is considerably reduced as compared to phosphorus.However, the authors (1) reported that the diffusion of arsenic was accelerated by low temperature heattreatment and that this caused the emitter dip effect. Such a phenomenon may be due to the excess vacancies formed during these treatments. Large decreases in the conductivity of arsenic-doped silicon during 500~176 heat-treatments were reported by Schwenker et al.(2). They suggested that the effect was due to the formation of As-As clusters. Miyamoto et al (3) also reported using the x-ray double crystal diffraction technique that the lattice constant of the arsenic-doped silicon was increased after heat-treatment at low temperature. They explained that this lattice expansion and the increase of resistivity were due to arsenic atom precipitation and SiAs formation. Osvenskii et al. (4) made an electron microscopic investigation of the structure of silicon single crystals doped with arsenic to a concentration of 5 • 1020 cm-S and observed the formation of prismatic dislocation loops during annealing at 800~ They concluded that the observed dislocation loops were formed by the decrease of a solid solution of arsenic in silicon. Furthermore, Haskell et al. (5) investigated the channeling measurements in arsenic-doped silicon using a He + ion backscattering technique, and both silicon-and arsenic-aligned yields increased in the arsenic-diffused samples during low temperature annealing. They suggested the model of the formation of the complex on substitutional lattice sites.Arsenic, which is a relatively normal diffusant in silicon at high temperature, shows the complicated behavior described above by low temperature annealing.In this paper, the emitter dip effect in a n-p-n transistor using arsenic for the emitter impurity by low temperature heat-treatments is reported. The previous paper (1) suggested that such emitter dip effect was due...

Stapelfehler, die im Si durch Wärmebehandlung in oxidierenden Atmosphären entstehen, schrumpfen während Wärmebehandlung bei 1100‐1200°C in N2 ‐Atmosphäre.