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Organic electronics is expected to find commercial applications in flexible displays, RFID tags and smart sensor systems, e.g. for food industry or biomedical applications. Key benefits of the technology are the direct production of transistors and circuits on flexible plastic foils, the possibility to directly integrate sensors, light sources, light detectors, a.o. with the same technology, and the low processing temperatures that warrant cost-efficient production. However, organic electronics technologies suffer from important drawbacks versus silicon based technologies, such as its intrinsically lower mobility, the large parameter variation and a very low intrinsic transistor gain (typically 5). Moreover as active components almost exclusively p-type transistors are available and as passive components only capacitors exist. In place of resistors, we are limited to only linear biased transistors. Work on organic RFID [1,2] and several types of organic sensors [3] has been presented. Analog designs in organic technology are in their infancy: a first differential amplifier with differential-mode gain of 10 was presented in [4]; design considerations for analog designs were discussed in [5]; a comparator was presented in [6]; and a 6-bit D/A converter based on a C-2C chain in [7]. In the present work, we disclose the first ADC designed, fabricated and measured in an organic technology on plastic foil with a fully analog design approach.The applied pentacene based technology with 3 metal layers provides only ptype organic thin-film transistors (p-OTFT) with minimum length of 5µm and metal-organic insulator-metal capacitors. This technology was developed by Polymer Vision for the production of the active matrix (AM) of rollable displays and is described elsewhere [8,9]. The AM of such displays does not require very small V t variations of the thin-film transistors, forcing us to deploy V t -insensitive analog design strategies.The choice for a ΔΣ ADC topology is determined by the feedback system that overcomes small variations. Moreover, for the same reason no digital calibration is needed. The architecture of the presented first order single bit ΔΣ converter is given in Fig. 7.2.1a. It mainly consists of an integrator and a comparator, shown in Fig. 7.2.b and Fig. 7.2.1c. Both circuits use the same basic analog single-stage amplifier topology, optimized for gain and V t -insensitivity. This circuit, shown in Fig. 7.2.2a, consists of a differential pair with linear common mode feedback (CMFB), bootstrapped gain enhancement and applies backgates connected to gates for all transistors. The CMFB has the advantage that it suppresses output DC variation that is caused by V t -variation. The bootstrapped gain enhancement is preferred over diode-connected load and cut-off load for its higher gain and V t -insensitivity respectively. A patterned 3 rd metal layer is deposited over all the transistors [9] and was used in our work to provide a backgate contact that enables to control V t . Connecting backgate to gate controls ...

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