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SummaryA servo channel loading card (SCLC) with high precision data acquisition and output is developed for static and fatigue testing of aircraft wings. A high‐performance processor field programmable gate array (FPGA) is at the core to control the excitation source (ES) output circuit to provide excitation for the force and displacement sensor. To improve the precision of the ES output circuit, a 3DA‐based ES auto‐calibration circuit is designed. Simulation results show that the 3DA improves the precision of the automatic calibration of the ES circuit. The sensor signals are collected through high precision analog channels, and the signals are automatically zero calibrated and numerical control gain processed. Ultimately, a voltage or current signal is generated through the drive circuit to control the electro‐hydraulic servo loading system to complete a high precision force loading test on the aircraft wings. The experimental results show that the board designed has high reliability in both acquisition and output. The ES output achieved a precision of 0.1375 mV/V, the precision of signal acquisition achieves a precision of −0.175 mV/V, and the servo drive output achieves a precision of −0.06 mV/V, meeting the expected design precision of 1 mV/V.

Resistive voltage dividers (RVDs) are commonly used as AC attenuation networks in measurement circuits; however, their high-frequency gain is always disturbed by nasty parasitic elements and deviates significantly from the desired design value. This paper proposes a closed-loop adjustment technique for adjusting the frequency response flatness of wideband RVDs (WRVDs). In the proposed adjustment scheme, the frequency response flatness of the WRVD is determined by a voltage-controlled compensation capacitor, whereas the corresponding control voltage is provided by a digital potentiometer. The settling time and the adjustment error of the loop are analyzed to evaluate the adjustment performance. To verify the concept, the adjustment loop is incorporated into a 100:1 WRVD for demonstration. Final experiments show that the proposed technique improves gain flatness by 81 times compared with uncompensated flatness, with 1.15% up to 2 MHz, and that the compensated voltage divider has an excellent linearity of 36 ppm up to 100 V.

SummaryThis paper presents an analog tracking bandpass filter that is intended to be applied in ac signal acquisition circuits to reduce measurement noise. A fast and accurate frequency tuning technique is developed based on the phase control loop. A complete derivation process is provided to build the mathematical model describing the control loop for the tracking filter. Accordingly, a zero‐crossing detector is designed to accurately extract signal phases in the proposed loop. As a closed‐loop control system, the loop dynamics such as stability, transient response, and steady‐state error are analyzed using the derived model. From both the simulations and measurements, the developed filter is found to provide excellent performance in frequency tracking, noise reduction, and linearity compared to existing work. The maximum and minimum Q value reaches 42.2 and 14, respectively, in the frequency tuning range of 34 to 107 kHz, while the frequency tracking error is less than 1.18% at 100 kHz.