No abstract

In this work, a study of the process variation effects on the threshold voltage of a floatinggate device is proposed. The study demonstrates the sensitivity of the threshold voltage to five geometrical parameters including gate length, gate width, tunneling gate oxide thickness, bottom oxide-nitride-oxide oxide thickness, and nitride spacer thickness. This paper also proposed a detailed flow to fabricate the floating-gate device for CMOS 180nm process, which is used to design the floating-gate device for the study. This paper used the TCAD tools including Athena, Devedit3D, and Atlas for the simulations.