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This paper reports on characterization results of a single-photon avalanche diode (SPAD) array in standard CMOS 150nm technology. The array is composed by 25 (5 × 5) SPADs, based on p/n-well active junction along with a retrograde deep n-well guard ring. The square-shaped SPAD has a 10µm active diameter and 15.6µm pitch size, achieving a 39.9% array fill factor. Characterization results show a good breakdown voltage uniformity (40mV max-min) within each chip and 17mV/°C temperature coefficient. The median DCR is 0.4Hz/µm, and the afterpulsing probability is 0.85% for a dead time of 150ns at 3V excess bias voltage. The peak PDP is 31% at 450nm wavelength and a good uniformity (1.1% standard deviation) is observed for the array at 5V excess bias. The single SPADs exhibit a timing jitter of 52ps (FWHM) and 42ps (FWHM) under a 468-nm and a 831-nm laser, respectively. The crosstalk probability as a function of pixel-to-pixel distance and excess bias voltage is presented, and random telegraph signal (RTS) noise is also discussed in detail.

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In this paper, a summary of characterization results from a SPAD test chip is reported. The chip includes test arrays based on two different SPAD structures, having p+/n-well and p-well/n-iso active area. Devices with different shapes and sizes as well as arrays dedicated to cross-talk extraction are present. Measurement results show that SPADs of the second type have a slightly lower Dark Count Rate. The peak Photon Detection Probability (PDP) is larger than 20% at 3V excess bias voltage for both structures. The average cross-talk probability between neighbors in SPAD arrays with 15.6μm pitch and 40% fill factor is less than 0.6% at 3V excess bias voltage for the first structure, while it is around 2.3% for the second one.