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One of the most significant issues in building general purpose massively parallel computers i s the integration of computation and communication in a n e@-cient and cost-effective manner.This paper presents a way of integrating computation and communication f r o m the viewpoint of the processor architecture. It firstly states the concept of RICA, Reduced Interprocessor-Communication Architecture, which means the simplified and fused structure of communication and computation. Hardwired simple direct invocation of threads, and fusion of execution pipelines and message handling pipelines are the mechanisms f o r R I C A .

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