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This paper presents a self-bias NAND (SBNAND) gate and its application to a non-overlapping (NOL) clock generator for extremely low-voltage CMOS LSIs. The SBNAND, consisting of a main NAND gate and feedback inverter, improves the output performance at extremely low supply voltage V DD by controlling the body-bias voltages V BS of the main NAND gate. Measurements of a proof-of-concept chip demonstrated that our proposed NOL clock generator using SBNANDs can operate at the extremely low V DD of 60 mV.

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This paper proposes a ring oscillator (ROSC) for extremely low-voltage LSI applications. The ROSC consists of dedicated low-voltage stacked body bias inverters (SBBIs) that are based on the conventional selfbias inverter (SBI) and stacked inverter (SI). The proposed SBBI employs the advantages of both SBI and SI to oscillate at extremely low supply voltage. The voltage gain of the proposed SBBI is improved by controlling main inverter's supply (DD and Gnd) and body-bias voltages, by using stacked and feedback inverters. The novelty of our proposed SBBI is in the combination of the conventional low-voltage circuit design techniques and its demonstration at extremely low supply voltage. Simulated and measured results in a 0.18-m CMOS process with deep n-well option demonstrated that the proposed ROSC can operate at extremely low supply voltage of 35 mV and generate a clock with a 88% voltage swing from an input supply voltage of 50 mV. To the best of the authors' knowledge, this is the lowest supply voltage CMOS ring oscillator ever reported.

This paper proposes a fully-integrated switched-capacitor (SC) voltage boost converter (VBC) with a digital maximum power point tracking (MPPT) control circuit for low-voltage and low-power energy harvesting. The proposed digital MPPT control circuit converts analog voltage information of a PV cell into digital values and extracts the maximum power regardless of the harvester conditions and load current. Measurement results demonstrated that our proposed circuit can track the maximum power point of a PV cell successfully. The maximum voltage conversion ratio of our circuit was 5.6. The proposed power management system (PMS) generated a 2.58-V output voltage from a 0.46-V input voltage. The maximum power conversion efficiency was 63.6%.