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The barrier effect for copper diffusion and the adhesion properties of copper seed layers were studied for sputtered TaSiN layers. The diffusion depth of copper following 400°C annealing is as deep as 25 nm using conventional tantalum nitride ͑TaN͒ barrier layers. With the doping of Si in this layer to form TaSiN, the diffusion depth decreases drastically, reaching 5.0 nm for an optimum Si composition of 0.06-0.09 The stress of thin copper seed layers deposited on TaSiN is much lower than that on conventional Ta barrier layers, decreasing rapidly with increasing Si composition. There appears to be no agglomeration in the low stress copper seed layer. The highest adhesion strength is attained in a copper layer deposited on a TaSiN adhesion layer with a Si composition of 0.16. Note that the optimized Si composition is different between two layers, that is, the barrier and adhesion layers.

This paper describes the properties and adhesion strength of electroplated copper layers deposited onto two different seed layers. In a thin ͑10 nm͒ seed layer, which we term seed layer A, agglomeration occurs across the full thickness of the layer and a stress free or lower stress seed layer is formed with an annealing at 400°C. A highly ͑111͒-oriented copper conductive layer is the result of this electroplating strategy. The adhesion strength is so high ͑40 gf͒ that no peeling occurs during chemical mechanical planarization ͑CMP͒ in this layer. When the layer is electroplated onto a thick ͑100 nm͒ seed layer, which we term seed layer B, agglomeration only occurs at the interface with Ta barrier layer with this annealing. Although a smooth copper layer still remains at the surface, a weakly ͑111͒-orientated copper layer is electroplated. The adhesion strength of this type of copper layer is as low as 10 gf so that peeling can easily occur both during annealing and CMP. Correlation is found between the critical pressure defined by the pressure occurring of the peeling in the copper layers during the CMP with adhesion strength.

The properties of copper conductive layers electroplated from a copper hexafluorosilicate electrolytic solution have been studied. The observed resistivity is in the region of 2.9 ⍀ cm for an as-deposited copper layer electroplated from a conventional copper sulfate electrolytic solution. By electroplating from a copper hexafluorosilicate electrolytic solution on a low stress seed layer, a copper conductive layer with a larger grain size and lower stress can be obtained. A resistivity of 1.85 ⍀ cm can be attained for such an as-deposited layer. This resistivity is much lower than the 2.8 ⍀ cm of other as-deposited layers by conventional copper electroplating.

The effect of the stress and grain size of the seed layer deposited on TaN and Ta/TaN barrier films on the properties of electroplated copper interconnection layer is described. Properties such as resistivity and grain size are studied. The effect of chemicals employed for electroplating the copper layer is also studied after deposition on these seed layers. A lower resistivity copper layer can be obtained by reducing stress and by growing grain size in the seed and interconnection layers.Reduction of layer resistance is required in the manufacturing of multilevel Cu interconnection for logic devices to reduce the resistance-capacitance ͑RC͒ time constant in the interconnection line and circuits. Enhancement of the speed in this circuit and solving the problems due to stress generated during multilevel process are needed. Only a few works are reported for the deposition and manufacture of a low resistance interconnection layer. 1 Since the interconnection layer is surrounded with a thick high resistivity barrier layer, a narrow cross-sectional area is obtained for low resistivity Cu interconnects for р100 nm technology node. Resistance of such a narrow line is so high in some cases that it is close to that of aluminum interconnection layer resistance. There are no advantages in such an interconnection layer other than that of better electromigration resistance. Recently, it was reported that resistance of a Cu interconnection layer is largely affected by the barrier layer and seed layer parameters. 2,3 However, there is little interest in lowering of layer resistance by optimization of barrier and seed layers and their relationship. Manufacturers mostly concentrate on self-annealing effects and conformability of deposition. Therefore, higher effective resistance layers than those of conventional aluminum interconnections are being obtained for very small feature sizes.Resistivity of an electroplated Cu layer has been reported as being determined mainly by the grain size and stress of this layer rather than due to impurities in the layer and self-annealing. Grain size of the electroplating Cu is determined mainly by the stress and orientation of the Cu seed layer employed for electroplating. 4 To deposit or fabricate a low resistance Cu interconnection layer, correlation of the resistivity with many other parameters must be obtained. In this paper, We describe the effect of stress and grain growth in the seed and electroplated layer on the resistivity in the interconnection layer. A lower resistivity Cu layer has been deposited employing the use of a newly developed electrolytic solution of Cu hexafluorosilicate ͑CHS͒. 1