To obtain a metal-ferroelectric-insulator-semiconductor (MFIS) structure, we fabricated ferroelectric SrBi 2 Ta 2 O 9 (SBT) film on a p-type Si (100) wafer with a LaZrO x (LZO) buffer layer by means of a sol-gel technique. The sol-gel deposited LZO film according to the different annealing temperatures had a good surface morphology even though the crystalline phase was not an amorphous phase. In particular, the root-mean-squared (RMS) surface roughness of the 750-°C-annealed LZO film was about 0.365 nm and its leakage current density was about 8.2× 10 −7 A/cm 2 at 10 V. A Au/SBT/LZO/Si structure with different SBT film was fabricated. The C-V characteristics of the Au/SBT/LZO/Si structure showed a clockwise hysteresis loop. The memory window width increased as the SBT film thickness increased. The 600-nm-thick SBT film was crystallized in a polycrystalline phase with a highly preferred (115) orientation. The memory window width of the 600-nm-thick SBT film was about 1.94 V at the bias sweep voltage ±9 V and the leakage current density was about 6.48×10 −8 A/cm 2 at 10 V.

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The lanthanum zirconium oxide thin films were prepared on p-type Si(100) by a solgel wet method. Sol-gel solutions of La x Zr 1−x O y with La atomic fractions of x = 0, 0.05, 0.1, 0.3, and 0.5 were synthesized for film deposition. Thin films were characterized using x-ray diffraction (XRD), atomic force microscopy (AFM), and scanning electron microscopy (SEM) . Electrical property characterization was performed with metal-insulator-semiconductor (MIS) structures through capacitance-voltage (C-V) and current density-voltage (J-V) measurements. The thin film showed a good surface morphology. Equivalent oxide thickness (EOT) values of 30 nm-thick La x Zr 1−x O y thin films annealed at 700• C were about 8.8-10.5 nm. C-V measurements revealed that curves shifted left when the film has a larger content of La or was annealed at a higher temperature. The leakage current density was below 1.0 × 10 −6 A/cm 2 at 1 MV/cm for all samples.

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