A reciprocal electromagnetically induced transparency (EIT) effect is proposed in the complementary metasurface structure, which is composed of metal orthogonal strips beside a silicon substrate. The EIT effect of reciprocity is obtained whether the incident wave propagates from the positive (+z) or reverse (−z) direction. A multiband EIT window is also obtained in the structure of horizontal strip and substrate silicon as bright mode and vertical strip as dark mode by the finite difference time domain (FDTD) method. The transmission mechanism is interpreted by giving the current surface and electric field distributions at certain frequencies. A polarization insensitive EIT can be realized theoretically due to the structure is symmetrical in the x and y directions. The effective permittivity of the structure was calculated by the method of inversion to reveal the transmission spectra. These results can be applied in many areas, such as multiband slow-light devices, active sensing and bidirectional devices.

A low power 10-bit 250 MSPS charge-domain (CD) pipelined analog-to-digital converter (ADC) is introduced. The ADC is implemented in MOS bucket-brigade devices (BBDs) based CD pipelined architecture. A replica controlled boosted charge transfer (BCT) circuit is introduced to reject the influence of PVT variations on the charge transfer process. Based on replica controlled BCT, the CD pipelined ADC is designed and realized in a 1P6M 0.18 μm CMOS process. The ADC achieves an SFDR of 64.4 dB, an SNDR of 56.9 dB and an ENOB of 9.2 for a 9.9 MHz input; and an SFDR of 63.1 dB, an SNR of 55.2 dB, an SNDR of 54.5 dB and an ENOB of 8.7 for a 220.5 MHz input at full sampling rate. The DNL is +0.5/ −0.55 LSB and INL is +0.8/ −0.85 LSB. The power consumption of the prototype ADC is only 45 mW at 1.8 V supply and it occupies an active die area of 1.56 mm2.

A 10-bit 250-MSPS two-channel time-interleaved charge-domain (CD) pipelined analog-to-digital converter (ADC) is presented. MOS bucket-brigade device (BBD) based CD pipelined architecture is used to achieve low power consumption. An all digital low power DLL is used to alleviate the timing mismatches and to reduce the aperture jitter. A new bootstrapped MOS switch is designed in the sample and hold circuit to enhance the IF sampling capability. The ADC achieves a spurious free dynamic range (SFDR) of 67.1 dB, signal-to-noise ratio (SNDR) of 55.1 dB for a 10.1 MHz input, and SFDR of 61.6 dB, SNDR of 52.6 dB for a 355 MHz input at full sampling rate. Differential nonlinearity (DNL) is C0.5/-0.4 LSB and integral nonlinearity (INL) is C0.8/-0.75 LSB. Fabricated in a 0.18-m 1P6M CMOS process, the prototype 10-bit pipelined ADC occupies 1.8 1.3 mm 2 of active die area, and consumes only 68 mW at 1.8 V supply.

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A classical structure for a U-shaped metasurface exhibiting a wideband and large angle electromagnetically induced transparency (EIT) effect in the terahertz range is proposed. One horizontal and two vertical strips, which represent the bright and dark modes, respectively, are created for the U-shaped structure. The finite integration time domain (FITD) and equivalent circuit method are compared with the EIT result. The EIT effect is affected by the length of the vertical bar and by the distance from the vertical bar to the symmetry axis. The results show that the asymmetry of the main structure in the x and y axes makes it easier to achieve the EIT effect. In addition, by changing the incident angle, the EIT effect always exists until the angle of the incidental electromagnetic wave is 85 degrees. These results have many potential applications for terahertz filtering, large-angle switching and sensors.