In this article, a design method of asynchronous FIFO memory based on FPGA is put forward. With FPGA as the core controller, We adopt Verilog HDL and top-down design method to build a top-level module design and also analyze the mark logic of asynchronous FIFO and the elimination of semi-stable state under Quartus II development platform. Besides, with the application of Gray code conversion technology, not only the reliable transmission of data is guaranteed but also design efficiency is improved. Through contrast experiment analysis and simulation test, the validity and reliability of asynchronous FIFO memory are verified, meeting the basic requirement that FIFO can hold more enough data without spillovers despite the fullness of data.

This work presented the design and implementation of a wireless acquisition system for seismic signal. 4 distributed signal acquisition stations were integrated to the low-power prototype which composed of 48 acquisition channels, and a star-shaped wireless network was built which is suitable for seismic data transmission using the networking mode of multi-pipe and multi-address switching. A distributed seismic data acquisition system was accomplished which has the function of synchronous control and asynchronous transmission. The key technical problems and solutions of time balance distribution between multi-channel time-sharing switching acquisition and temporary storage, and wireless seismic data transmission is analyzed in detail in this paper. Thus the additional accessories of traditional wired seismograph were greatly reduced, to improve its cable layout trouble and low efficiency of construction in an adverse environment. This system increased efficiency more than 50% and took same exploration effect compared with wired mode in the field application.