Abstract-Within-die process variations arise during integrated circuit (IC) fabrication in the sub-100nm regime. These variations are of paramount concern as they deviate the performance of ICs from their designers' original intent. These deviations reduce the parametric yield and revenues from integrated circuit fabrication. In this paper we provide a complete treatment to the subject of within-die variations. We propose a scan-chain based system, vMeter, to extract within-die variations in an automated fashion. We implement our system in a sample of 90nm chips, and collect the within-die variations data. Then we propose a number of novel statistical analysis techniques that accurately model the within-die variation trends and capture the spatial correlations. We propose the use of maximum-likelihood techniques to find the required parameters to fit the model to the data. The accuracy of our models is statistically verified through residual analysis and variograms. Using our successful modeling technique, we propose a procedure to generate synthetic within-die variation patterns that mimic, or imitate, real silicon data.

Importance sampling in the setting of heavy tailed random variables has generally focused on models with additive noise terms. In this work we extend this concept by considering importance sampling for the estimation of rare events in Markov chains of the formwhere the B n 's and A n 's are independent sequences of independent and identically distributed (i.i.d.) random variables and the B n 's are regularly varying and the A n 's are suitably light tailed relative to B n . We focus on efficient estimation of the rare event probability P(X n > b) as b ∞. In particular we present a strongly efficient importance sampling algorithm for estimating these probabilities, and present a numerical example showcasing the strong efficiency.