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Thin film transistors using In-Ga-Zn-O (IGZO) semiconductors were evaluated under current stress by applying positive voltages to the gate and drain electrodes. Initially, the transfer characteristics exhibit identical threshold voltages (V T ) when the source and drain electrodes are interchanged during measurement ( forward and reverse V DS sweep). However as stress time increases, larger shifts in V T are observed under forward V DS sweep than under reverse V DS sweep conditions. Sub-gap states analyses based on the photoresponse of capacitance-voltage (C-V) curves suggest that local annihilation of donor-like traps occurs near the drain electrode. Hump-like features are clearly observed in the C-V curves collected between the drain and gate electrodes,while they do not appear in the C-V data obtained between the source and the gate. Based on the above, a local charge trapping model is introduced in order to interpret the device degradation. In this model, the major carrier electrons are trapped more abundantly near the source electrode due to the presence of a Schottky junction between IGZO and the source/drain electrodes.

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In this work, we propose the subgap density‐of‐states (DOS) based device‐circuit co‐design platform for solution‐processed organic integrated circuits. For the circuit simulation, analytical I‐V and C‐V model were established from experimentally extracted DOS parameters, incorporated into HSPICE via Verilog‐A, and verified by comparing the simulation result with the measured characteristics of inverter integrated with solution‐processed polymer‐based organic thin‐film‐transistors. Furthermore, as the case study, it was shown by using our well‐calibrated simulation platform that the pass‐transistor type logic was potentially promising in low‐power and high‐speed solution processed organic integrated circuits.