After decades of process scaling driven by Moore's law, the silicon microelectronics world is now defined by length scales that are many times smaller than the dimensions of typical micro-optical components. This size mismatch poses an important challenge for those working to integrate photonics with complementary metal oxide semiconductor (CMOS) electronics technology. One promising solution is to fabricate optical systems at metal/dielectric interfaces, where electromagnetic modes called surface plasmon polaritons (SPPs) offer unique opportunities to confine and control light at length scales below 100 nm (refs 1, 2). Research groups working in the rapidly developing field of plasmonics have now demonstrated many passive components that suggest the potential of SPPs for applications in sensing and optical communication. Recently, active plasmonic devices based on III-V materials and organic materials have been reported. An electrical source of SPPs was recently demonstrated using organic semiconductors by Koller and colleagues. Here we show that a silicon-based electrical source for SPPs can be fabricated using established low-temperature microtechnology processes that are compatible with back-end CMOS technology.

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We measured electron density and electron energy distribution function (EEDF) vertically through our reactor for a range of process conditions and for various gases. The EEDF of Ar plasma in the reactor could largely be described by the MaxwellBoltzmann distribution function, but it also contained a fraction (~10 -3 ) of electrons which were much faster (20-40 eV). At low pressures (6.8-11 µbar), the tail of fast electrons shifted to higher energies (E max ~ 50 eV) as we measured more towards the chuck. This tail of fast electrons could be shifted to lower energies (E max ~ 30 eV) when we increased pressure to 120 µbar or applied an external magnetic field of 9.5 µT. Addition of small amounts of N 2 (1-10%) or N 2 O (5%) to Ar plasma lowered the total density of slow electrons (approx. by a factor of two) but did not change the shape of the fast-electron tail of the EEDF. The ionization degree of Ar-plasma increased from 2.5·10 -4 to 5·10 -4 when an external magnetic field of 9.5 µT was applied. Motivation

Abstract-This paper presents a novel approach to make highperformance CMOS at low temperatures. Fully functional devices are manufactured using back-end compatible substrate temperatures after the deposition of the amorphous-silicon starting material. The amorphous silicon is pretextured to control the location of grain boundaries. Green-laser annealing is employed for crystallization and dopant activation.

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