Low-Temperature Fabricated TFTs on Polysilicon Stripes

Abstract

Abstract-This paper presents a novel approach to make highperformance CMOS at low temperatures. Fully functional devices are manufactured using back-end compatible substrate temperatures after the deposition of the amorphous-silicon starting material. The amorphous silicon is pretextured to control the location of grain boundaries. Green-laser annealing is employed for crystallization and dopant activation.

Metal-free and non-fluorine paper-based generator

“…They are also flexible to be rolled or folded into three-dimensional (3D) configurations [2]. These advantages from paper-based electronics were inspired to develop many innovative applications, including ring oscillators [3][4][5][6], transistors [7,8], touch pads [9], smart package [10][11][12][13][14][15] and so on. However, those paperbased system required external power supply [16][17][18][19], which were restricted the applications due to their size, flexibility and/or environmental impact.…”

Bias temperature instability comparison of CMOS LTPS-TFTs with HfO2 gate dielectric

“…Low-temperature poly-Si thin-film transistors (LTPS-TFTs) have been widely studied for the application of active matrix liquid crystal display [1], organic light-emitting diode display [2], system-onpanel (SOP) and 3D integrated circuit (3D-IC) [3][4][5]. The employment of high-j gate dielectric is a simple way to achieve high electrical performance of LTPS-TFTs without any additional defect passivation process due to its high gate capacitance density [6][7][8].…”

Electrical Properties of Plasma-Deposited Silicon Oxide Clarified by Chemical Modeling

“…A very low midgap interface state density of 3⋅10 10 eV -1 ⋅cm -2 was obtained. These films were successfully applied in the fabrication of low-temperature TFTs with a competitive performance (6,9).…”