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Noise figures as low as 8 dB have been measured for Indium Phosphide reflection amplifiers operating over J-band (12)(13)(14)(15)(16)(17)(18).A single-stage, low noise, reflection amplifier circuit has been designed to provide a gain of 8 dB at 15 GHz., with a 1 GHz bandwidth. The effect of the package impedance parameters on available gain and bandwidth have been determined, and the properties of the completed amplifier are discussed.The properties of Indium Phosphide transferred electron amplifier devices and the design and construction of a single-stage reflection amplifier utilising these devices are discussed.Several authors (1,2,3) have shown both theoretically and experimentally that InP TEA devices have a significantly lower noise figure than GaAs devices.Using an n -n-n sandwich structure, integral heat sink devices ( Figure 1) have been processed from slices with epitaxial layer doping densities as low as 1013 cmK3, produced by the Plessey Company Limited or by R.RE., Malvern. The IEIS structure was chosen to minimise thermal impedance; ensuring a sufficiently low layer temperature to allow c.w.operation. Typical thicknesses for the epitaxially grown layers are n+ contact layer 2 pm, active layer 9 pm, and the n+ substrate is 14 pm.The metal contact on the n+ contact layer is indium-germanium-gold, gold plated to 50 pm thickness while the substrate contact is a titaniumpalladium-gold Schottky barrier. This type of contact gives improved adhesion compgred with alloyed contacts and the low temperature evaporation (~200 C) avoids inducing strain in the device during the alloying cycle. The devices may be operated with either polarity of bias but significantly improved heat sinking is obtained with the plated heatsink as the anode. At the device operating temperature, there is no significant voltage drop across the Schottky barrier, and the soft reverse characteristic appears ohmic. Devices from a number of slices have given noise figures of 8-9 dB with gains in exess of 10 dB in J-band and 80% of all slices processed have had noise figures below 12 dB. In Figure 2, noise figure is plotted as a function of epitaxial layer doping density for all batchls processed, and an asymptotic approach to 7 to 8 dB apparent. B-optimising the bias as the frequency 695 varies, a variation in noise figure of less than 1 dB across J-band can readily be obtained as shown in Figure 3.An example of the effect of the package on the chip impedance is shown in Figure 4. Similar chips from the same batch were mounted in commercially available packages (S-4 and AV-162), and the impedance of the packaged device measured in a 50 ohm line using an automatic network analyser at R.R.E., Malvern. Using a simple model for the chip impedance (5) and a iT equivalent network ( Figure 5) for the package, the chip impedance was transformed through this. network to give the resultant packaged impedance. Each of the various network elements was varied in turn and the effect of varying C2, for example, is shown in Figure 6. This shows that for ma...