A novel technique for the selective photochemical synthesis of silver (Ag) nanoparticles (NPs) on ZnO nanorod arrays is established by combining ultraviolet-assisted nanoimprint lithography (UV-NIL) for the definition of growth sites, hydrothermal reaction for the position-controlled growth of ZnO nanorods, and photochemical reduction for the decoration of Ag NPs on the ZnO nanorods. During photochemical reduction, the size distribution and loading of Ag NPs on ZnO nanorods can be tuned by varying the UV-irradiation time. The photochemical reduction is hypothesized to facilitate the adsorbed citrate ions on the surface of ZnO, allowing Ag ions to preferentially form Ag NPs on ZnO nanorods. The ratio of visible emission to ultraviolet (UV) emission for the Ag NP-decorated ZnO nanorod arrays, synthesized for 30 min, is 20.5 times that for the ZnO nanorod arrays without Ag NPs. The enhancement of the visible emission is believed to associate with the surface plasmon (SP) effect of Ag NPs. The Ag NP-decorated ZnO nanorod arrays show significant SP-induced enhancement of yellow-green light emission, which could be useful in optoelectronic applications. The technique developed here requires low processing temperatures (120 °C and lower) and no high-vacuum deposition tools, suitable for applications such as flexible electronics.

We report In0.52Al0.48As/In0.7Ga0.3As/In0.52Al0.48As single-quantum-well metal-insulator-semiconductor field-effect transistors (MISFETs) with a selective source/drain regrowth process. Long-channel InGaAs MISFETs yielded a subthreshold swing (S) of 61 mV/decade at VDS = 0.05 V and room temperature, and displayed very little frequency dispersion behavior in capacitance–voltage (CV) characteristics in both the strong-inversion and weak-inversion regimes. Both the S and CV results reflect the excellent interface quality between a molecular beam epitaxy-grown InAlAs insulator and an InGaAs channel. The devices showed as little as 0.8% per decade of frequency dispersion at the maximum gate capacitance in the strong-inversion regime. Moreover, the fabricated devices yielded an effective mobility (μ n_eff) of 11 900 cm2 V−1 · s−1 at room temperature, and degradation of μ n_eff with V GS in the strong-inversion regime was negligible. These results are a consequence of the small interfacial state density and the smooth surface morphology at the interface.

In this study, we report experimental results on the epitaxial growth of InP layer on GaAs (001) substrate by using MOCVD. We have systematically controlled nucleation steps in order to obtain InP epitaxial layers with high crystallinity quality. The controlling parameters were flow ratio of V/IIIsources and thicknesses of nucleation layer for nucleation steps. We successfully improved the surface roughness and crystallinity of IIP epitaxial layers on GaAs substrates.

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Ni/TiN and Al/TiN bilayer stacks were investigated to determine the influence of the thin metals on the total effective workfunction. The workfunctions of the bilayer stacks were measured using C-V (capacitance-voltage) curves. The effective workfunctions of both bilayer stacks were controlled by changing the TiN layer thickness. The workfunctions of both bilayer stacks shift toward the workfunction of the upper layer, and the absolute effective workfunction of the Ni/TiN bilayer stack was higher than that of the Al/TiN bilayer stack. The workfunction of the TiN layer itself decreased with the decreasing thickness.Polycrystalline silicon is commonly used as a gate electrode material because of its good thermal stability with SiO 2 dielectric layers and the wide tunability of its workfunction. However, dopant diffusion and an increase in the electrical thickness of the gate depletion layer critically affect device reliability and performance, which limits the further use of polycrystalline silicon in gate electrodes. 1-3 To overcome these limits, the gate electrode material used in metal-oxide-semiconductor field-effect transistor (MOSFETs) must be changed from polycrystalline silicon to a metal. The workfunction is one of the most important properties, when selecting material for use in gate electrodes. 4-6 However, modulation of a metal's workfunction is difficult because it has an inherent value, while that of polycrystalline silicon can be controlled by the dopant concentration. Many research groups changed the workfunction of metal gate electrodes to overcome the limitations of metal workfunction properties. 7-13 One method used is the bilayer gate stack method, in which the workfunction of two metal layers formed by a thin lower metal layer and an thick upper metal layer falls between the workfunctions of both layers, because the workfunction of a bilayer gate stack is linearly dependent on the thickness of the thin metal layer. 14-18 In applying this method, we chose a bilayer metal stack composed of a midgap material and bandedge materials having a low or high workfunction. These combinations can cover a full range of workfunctions suitable for both n channel MOSFET and p channel MOSFET. We investigated the effect of the thin lower metal layer on the change in the total effective workfunction using TiN as the midgap material with Al (low workfunction) and Ni (high workfunction) as bandedge materials.A thick oxide layer (700 nm) was grown on a 6 in. p-type silicon (100) wafer using a wet furnace. A photoresist mask was formed using a conventional photolithography process. A thick oxide wafer was patterned using an etching process in a dry etcher. The depth of the dot-shaped etched pattern was 500 nm, and its diameter was 200 lm. The photo resist (PR) mask was removed using a PR asher machine. After the ashing process, the patterned wafer was dipped in BOE (buffered oxide etchant) solution to remove the residual 200 nm oxide from the pattered region. This two-step etching process was performed to remove the ...