ELTs laser guide stars wavefront sensors are planned to have specifically developed sensor chips, which will probably include readout logic and D/A conversion, followed by a powerful FPGA slope computer located very close to it, but not inside for flexibility and simplicity reasons. This paper presents the architecture of an FPGA-based wavefront slope computer, capable of handling the sensor output stream in a massively parallel approach. It will feature the ability of performing dark and flat field correction, the flexibility needed for allocating complex processing schemes, the capability of undertaking all computations expected to be performed at maximum speed, even though they were not strictly related to the calculation of the slopes, and the necessary housekeeping controls to properly command it and evaluate its behaviour. Feasibility using today's technology is evaluated, clearly showing its viability, together with an analysis of the amount of external memory, power consumption and printed circuit board space needed. The proposed conceptual design described in this article is based on the use of massive parallel processing with FPGAs[3][4], to be used in the critical path of the slopes computation. This very fast and low-latency scheme will be helped by a conventional processor in charge of all "housekeeping" tasks, including initialization, supervision, data logging, and also all other small-speed loops and calculations to be performed.Next chapter will describe the algorithm to be implemented, followed by the description of the proposed stream processor and a conceptual design of the different modules (cap. 4). Finally, key parameters of the design will be evaluated in order to verify the viability of the concept and extract its main features. *LRR@iac.es; phone +34 922 605 200; fax +34 922 605 210; www.iac.es

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