The European Solar Telescope (EST) is a project aimed at studying the magnetic connectivity of the solar atmosphere, from the deep photosphere to the upper chromosphere. Its design combines the knowledge and expertise gathered by the European solar physics community during the construction and operation of state-of-the-art solar telescopes operating in visible and near-infrared wavelengths: the Swedish 1m Solar Telescope, the German Vacuum Tower Telescope and GREGOR, the French Télescope Héliographique pour l’Étude du Magnétisme et des Instabilités Solaires, and the Dutch Open Telescope. With its 4.2 m primary mirror and an open configuration, EST will become the most powerful European ground-based facility to study the Sun in the coming decades in the visible and near-infrared bands. EST uses the most innovative technological advances: the first adaptive secondary mirror ever used in a solar telescope, a complex multi-conjugate adaptive optics with deformable mirrors that form part of the optical design in a natural way, a polarimetrically compensated telescope design that eliminates the complex temporal variation and wavelength dependence of the telescope Mueller matrix, and an instrument suite containing several (etalon-based) tunable imaging spectropolarimeters and several integral field unit spectropolarimeters. This publication summarises some fundamental science questions that can be addressed with the telescope, together with a complete description of its major subsystems.

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ELTs laser guide stars wavefront sensors are planned to have specifically developed sensor chips, which will probably include readout logic and D/A conversion, followed by a powerful FPGA slope computer located very close to it, but not inside for flexibility and simplicity reasons. This paper presents the architecture of an FPGA-based wavefront slope computer, capable of handling the sensor output stream in a massively parallel approach. It will feature the ability of performing dark and flat field correction, the flexibility needed for allocating complex processing schemes, the capability of undertaking all computations expected to be performed at maximum speed, even though they were not strictly related to the calculation of the slopes, and the necessary housekeeping controls to properly command it and evaluate its behaviour. Feasibility using today's technology is evaluated, clearly showing its viability, together with an analysis of the amount of external memory, power consumption and printed circuit board space needed. The proposed conceptual design described in this article is based on the use of massive parallel processing with FPGAs[3][4], to be used in the critical path of the slopes computation. This very fast and low-latency scheme will be helped by a conventional processor in charge of all "housekeeping" tasks, including initialization, supervision, data logging, and also all other small-speed loops and calculations to be performed.Next chapter will describe the algorithm to be implemented, followed by the description of the proposed stream processor and a conceptual design of the different modules (cap. 4). Finally, key parameters of the design will be evaluated in order to verify the viability of the concept and extract its main features. *LRR@iac.es; phone +34 922 605 200; fax +34 922 605 210; www.iac.es

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