A fully integrated, low phase noise, dual-band voltage controlled oscillator (VCO) utilizing a novel tuning scheme is reported. Coarse digital tuning is achieved using MOSFETs and fine analog tuning utilizes PN varactors. The measured phase noise is -95dBc/Hz max at 3GHz +25kHz over the whole tuning bandwidth (f12.5%), and the power dissipated is 22.5mW. To our knowledge, these are the best results published so far.

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Digitally-enhanced cordless telephone (DECT) is a standard for residential cordless telephony and wireless local loop. Components for this market must be low-cost and highly-integrated. Figure 1 shows the block diagram of the DECT radio frequency integrated circuit (RFIC). This IC, combined with an IFIC, baseband converter, low-noise amplifier, and power amplifier form the basis for a DECT telephone. The RFIC is fabricated on a highspeed (25GHz f,) bipolar process [l].The radio frequency (RF) architecture includes an upconverter transmit chain, a single downconverting receiver, a voltage controlled oscillator (VCO) and local oscillator (LO) distribution network, a low drop-out voltage regulator, and a mode controller. The four operating modes are: receive, transmit, synth (where the VCO is active only) and standby. Within the IC, all RF/IF blocks work with a supply voltage as low as 2.7Vat -45°C. Supply biasing for all functions (except theVC0)is provided by the regulator that can be connected directly to the battery voltage. To avoid frequency pulling during mode switching, the VCO supply comes from the regulator on the IFIC.In receive mode, the incoming signal flows from the antenna through an external LNA onto the IC where it is mixed with the low sidelocaloscillator(externallyphase1ocked) down to 11OMHz. The receive mixer is a class AB micromixer shown in a simplified schematic form in Figure 2 [a]. Within the micromixer, the incoming signal is first split in phase and amplified by the common base, cascode parallel combination, then chopped by the switching core. The input transistors are large (lox min) to minimize noise contributions due to base resistance. The core transistors are driven by a 15OmVp signal from the VCO and LO distribution network. The mixer is biased using a translinear loop and Vcc is supplied through resistors. A differential IF amplifier loads the mixer output and provides some low-pass filtering. The balanced output signal is converted to single ended by an external 1:l transformer with a 150Q load. In receive mode, the IC draws 37mA at 2.7V and 27°C. The receiver RF performance is summarized in Table 1.In transmit mode, the 130MHz IF, from the IFIC, is upconverted by an degenerated Gilbert cell mixer. The differential RF output is buffered by a cascoded differential amplifier with a tuned load. The tuned load has the advantage of bandpass filtering. The IF leakage, and to some degree the LO leakage will not be amplified by the buffer. Since the cascode differential amplifier requires 3 VQ and runs at a high current level, there is little or no headroom for standard resistive loads. The tuned load consists of on-chip 2nH spiral inductors resonated by 3.5pF capacitors. Resonating the inductors allows for the use of smaller value (and thus physical size) inductors while still realizing a high impedance. This high impedance is typically limited by the Q factor of the components. In this case the spiral inductors exhibit a Q of about 5 and thus limit the resonant impedance to about loon.Th...

An ISM-band transceiver chip includes an LNA, imaige-reject up-and down-converters, a VCO, a 164465 dual-modulus prescaler, an IF Limiting amplifier/ IiSSI strip, and a voltage regulator. The IC operates from a single-supply down to 3.0 V and is optimized lor a 10.7 MHz IF frequency to allow use of very lowcost ceramic filters. The 6.8 mm2 chip is fabricated rising a 24 GHz fT Si bipolar process and mounted in :I 28 pin SSOP package.