The recent discovery of ferroelectricity in thin hafnium oxide films has led to a resurgence of interest in ferroelectric memory devices. Although both experimental and theoretical studies on this new ferroelectric system have been undertaken, much remains to be unveiled regarding its domain landscape and switching kinetics. Here we demonstrate that the switching of single domains can be directly observed in ultrascaled ferroelectric field effect transistors. Using models of ferroelectric domain nucleation we explain the time, field and temperature dependence of polarization reversal. A simple stochastic model is proposed as well, relating nucleation processes to the observed statistical switching behavior. Our results suggest novel opportunities for hafnium oxide based ferroelectrics in nonvolatile memory devices.

For the rather new hafnia- and zirconia-based ferroelectrics, a lot of questions are still unsettled. Among them is the electric field cycling behavior consisting of (1) wake-up, (2) fatigue, and (3) the recently discovered subcycling-induced split-up/merging effect of transient current peaks in a hysteresis measurement. In the present work, first-order reversal curves (FORCs) are applied to study the evolution of the switching and backswitching field distribution within the frame of the Preisach model for three different phenomena: (1) The pristine film contains two oppositely biased regions. These internal bias fields vanish during the wake-up cycling. (2) Fatigue as a decrease in the number of switchable domains is accompanied by a slight increase in the mean absolute value of the switching field. (3) The split-up effect is shown to also be related to local bias fields in a complex situation resulting from both the field cycling treatment and the measurement procedure. Moreover, the role of the wake-up phenomenon is discussed with respect to optimizing low-voltage operation conditions of ferroelectric memories toward reasonably high and stable remanent polarization and highest possible endurance.

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We successfully implemented a one-transistor (1T) ferroelectric field effect transistor (FeFET) eNVM into a 28nm gate-first super low power (28SLP) CMOS technology platform using two additional structural masks. The electrical baseline properties remain the same for the FeFET integration and the JTAG-controlled 64 kbit memory shows clearly separated states. High temperature retention up to 250 degrees C is demonstrated and endurance up to 10(5) cycles was achieved. The FeFET unique properties make it the best candidate for eNVM solutions in sub-2x technologies for low-cost IoT applications