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A new fused floating-point magnitude unit to compute the square-root of the sum of two squares is proposed. Conventionally, the magnitude computation is executed by discrete serial or parallel floating-point units with conventional floating-point multiplication, squares, addition, and square-root units. The proposed fused floating-point magnitude design has an enhanced exponent unit because the exponent processes of the sum-of-squares and square-root can be merged. Moreover, normalization to make the exponent an even number is not necessary for the fused magnitude unit. Normalization and rounding processing between the squares, addition and squareroot computations are eliminated. This paper compares the fused magnitude unit with the conventional discrete floating-point magnitude units. Compared with the discrete parallel magnitude unit with conventional floating-point squarers, an adder, and a square-root unit, the fused floating-point magnitude unit has 24% less area, 24% less latency, and 27% less power consumption (26% less in the pipeline model). Keywords-low-power floating-point arithmetic unit, fused floating-point arithmetic unit, floating-point magnitude unit.