In this work, we demonstrate the simple fabrication process of AlN-based piezoelectric energy harvesters (PEH), which are made of cantilevers consisting of a multilayer ion beam-assisted deposition. The preferentially (001) orientated AlN thin films possess exceptionally high piezoelectric coefficients d33 of (7.33 ± 0.08) pC∙N−1. The fabrication of PEH was completed using just three lithography steps, conventional silicon substrate with full control of the cantilever thickness, in addition to the thickness of the proof mass. As the AlN deposition was conducted at a temperature of ≈330 °C, the process can be implemented into standard complementary metal oxide semiconductor (CMOS) technology, as well as the CMOS wafer post-processing. The PEH cantilever deflection and efficiency were characterized using both laser interferometry, and a vibration shaker, respectively. This technology could become a core feature for future CMOS-based energy harvesters.

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Measuring the efficiency of piezo energy harvesters (PEHs) according to the definition constitutes a challenging task. The power consumption is often established in a simplified manner, by ignoring the mechanical losses and focusing exclusively on the mechanical power of the PEH. Generally, the input power is calculated from the PEH’s parameters. To improve the procedure, we have designed a method exploiting a measurement system that can directly establish the definition-based efficiency for different vibration amplitudes, frequencies, and resistance loads. Importantly, the parameters of the PEH need not be known. The input power is determined from the vibration source; therefore, the method is suitable for comparing different types of PEHs. The novel system exhibits a combined absolute uncertainty of less than 0.5% and allows quantifying the losses. The approach was tested with two commercially available PEHs, namely, a lead zirconate titanate (PZT) MIDE PPA-1011 and a polyvinylidene fluoride (PVDF) TE LDTM-028K. To facilitate comparison with the proposed efficiency, we calculated and measured the quantity also by using one of the standard options (simplified efficiency). The standard concept yields higher values, especially in PVDFs. The difference arises from the device’s low stiffness, which produces high displacement that is proportional to the losses. Simultaneously, the insufficient stiffness markedly reduces the PEH’s mechanical power. This effect cannot be detected via the standard techniques. We identified the main sources of loss in the damping of the movement by the surrounding air and thermal losses. The latter source is caused by internal and interlayer friction.

The aim of this paper is to design, implement, test and compare several tracking filtration methods for predictive maintenance of a jet engine. Based on literature review multiple possible methods are described. Appropriate ones selected for further implementation are peak filtration, coherent demodulation, Vold-Kalman filtration and order analysis. Methods are tested to meet criteria set by an aircraft manufacturer and compared using simulated signals.

This paper deals with a logarithmic and a linear chirp sine generation on a fixed-point FPGA mainly for vibration testing, nevertheless, the generator can also be used in other areas. A basic overview of the logarithmic chirp sine signal is provided. Then, methods of software signal generation as well as different hardware platforms are briefly described and their pros and cons are mentioned. A DDS generator on FPGA needs the phase difference between samples as an input. This generation for the logarithm chirp sine signal is presented, and its resolution, errors and limitations on fixed-point arithmetic are revealed. Our implementation runs on Compact RIO 9067, uses 32-bit fixed-point and is able to generate linear and logarithm chirp signals from 10 Hz to 7 kHz with a minimum chirp speed of 1 oct/min.