This paper presents a study on the influence of strong magnetic field on NMOS transistors' electrical characteristics. Experiments have been carried out in a small animal 7T MRI scanner, and have shown that up to 7T the influence exists but remains manageable. It is demonstrated that it depends on the transistor size, on the orientation of the chip inside the field, and on the VGS voltage. A theoretical analysis in good agreement with experiments has been developed. Extrapolation to ultra-high field, i.e. above 10T, shows that at such a field magnitude the influence may be challenging, asking for specific design techniques to devise in order to make the circuit immune to the strong magnetic field.

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The topic of this work is the building of a designoriented compact model of vertical Hall-effect sensors integrated in CMOS technologies. The use of such a model should facilitate the work of integrated sensors designers, permitting them to simulate the sensor, the biasing and processing electronics together with the same electrical simulator. In this paper, focus is made on the electrical behavior, i.e. the resistive behavior of a 5-contact sensor. The model is based both on theoretical considerations and on numerical simulations performed with COMSOL ® . The result is a new compact model, written in Verilog-A, with 7 input terminals and 16 parameters, mainly the sensor geometry and the technology characteristics. These parameters can be easily extracted from measurements carried out on a single sensor. Our approach is validated by FEM simulations: the results obtained with the compact model exhibit an average error lower than 1% in comparison with simulations.

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